arc: significant cache rework
[1] Align cache management functions to those in Linux kernel. I.e.: a) Use the same functions for all cache ops (D$ Inv/Flush) b) Split cache ops in 3 sub-functions: "before", "lineloop" and "after". That way we may re-use "before" and "after" functions for region and full cache ops. [2] Implement full-functional L2 (SLC) management. Before SLC was simply disabled early on boot. It's also possible to enable or disable L2 cache from config utility. [3] Disable/enable corresponding caches early on boot. So if U-Boot is configured to use caches they will be used at all times (this is useful in partucular for speed-up of relocation). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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Alexey Brodkin

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@@ -29,12 +29,7 @@
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_ISA_ARCV2
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void slc_enable(void);
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void slc_disable(void);
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void slc_flush(void);
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void slc_invalidate(void);
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#endif
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void cache_init(void);
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#endif /* __ASSEMBLY__ */
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