colin/u-boot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge patch series "Cleanup dma device in spl and move dma channel[0]"

Browse Source 
Prasanth Babu Mantena <p-mantena@ti.com> says:

The channel allocation and deallocation for dma copy was happening on every
dma transfer. This is a overhead for transactions like NAND, which does
page reads recursively for complete data.

So, moving the dma allocation to probe and implement corresponding
remove function and cleanup dma device while exiting from spl.

Enable SPL_DM_DEVICE_REMOVE, for device removal capability in SPL.

Link: https://lore.kernel.org/r/20241009145703.1970034-1-p-mantena@ti.com
This commit is contained in:
Tom Rini
2024-10-17 15:13:27 -06:00
parent 0a504585d1 f83076add0
commit f1de0b97d1
14 changed files with 210 additions and 163 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
arch/arm/mach-k3/common.c
View File

@@ -28,6 +28,8 @@
#include <env.h>
#include <elf.h>
#include <soc.h>
#include <dm/uclass-internal.h>
#include <dm/device-internal.h>
#include <asm/arch/k3-qos.h>
@@ -246,12 +248,32 @@ void spl_enable_cache(void)
#endif
}
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
void spl_board_prepare_for_boot(void)
static __maybe_unused void k3_dma_remove(void)
{
dcache_disable();
struct udevice *dev;
int rc;
rc = uclass_find_device(UCLASS_DMA, 0, &dev);
if (!rc && dev) {
rc = device_remove(dev, DM_REMOVE_NORMAL);
if (rc)
pr_warn("Cannot remove dma device '%s' (err=%d)\n",
dev->name, rc);
} else
pr_warn("DMA Device not found (err=%d)\n", rc);
}
void spl_board_prepare_for_boot(void)
{
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
dcache_disable();
#endif
#if IS_ENABLED(CONFIG_SPL_DMA) && IS_ENABLED(CONFIG_SPL_DM_DEVICE_REMOVE)
k3_dma_remove();
#endif
}
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
void spl_board_prepare_for_linux(void)
{
dcache_disable();

1
configs/am62ax_evm_a53_defconfig
View File

@@ -45,6 +45,7 @@ CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/am62ax_evm_r5_defconfig
View File

@@ -68,6 +68,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_NO_NET=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/am62x_evm_a53_defconfig
View File

@@ -63,6 +63,7 @@ CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/am62x_evm_r5_defconfig
View File

@@ -75,6 +75,7 @@ CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/j7200_evm_a72_defconfig
View File

@@ -91,6 +91,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/j7200_evm_r5_defconfig
View File

@@ -76,6 +76,7 @@ CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/j721e_evm_a72_defconfig
View File

@@ -97,6 +97,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/j721e_evm_r5_defconfig
View File

@@ -85,6 +85,7 @@ CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/j721s2_evm_a72_defconfig
View File

@@ -90,6 +90,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/j721s2_evm_r5_defconfig
View File

@@ -86,6 +86,7 @@ CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

1
configs/j784s4_evm_a72_defconfig
View File

@@ -42,6 +42,7 @@ CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y

1
configs/j784s4_evm_r5_defconfig
View File

@@ -73,6 +73,7 @@ CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_DEVICE_REMOVE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y

333
drivers/dma/ti/k3-udma.c
View File

@@ -1700,141 +1700,6 @@ static int setup_resources(struct udma_dev *ud)
return ch_count;
}
static int udma_probe(struct udevice *dev)
{
struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct udma_dev *ud = dev_get_priv(dev);
int i, ret;
struct udevice *tmp;
struct udevice *tisci_dev = NULL;
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
ofnode navss_ofnode = ofnode_get_parent(dev_ofnode(dev));
ud->match_data = (void *)dev_get_driver_data(dev);
ret = udma_get_mmrs(dev);
if (ret)
return ret;
ud->psil_base = ud->match_data->psil_base;
ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
"ti,sci", &tisci_dev);
if (ret) {
debug("Failed to get TISCI phandle (%d)\n", ret);
tisci_rm->tisci = NULL;
return -EINVAL;
}
tisci_rm->tisci = (struct ti_sci_handle *)
(ti_sci_get_handle_from_sysfw(tisci_dev));
tisci_rm->tisci_dev_id = -1;
ret = dev_read_u32(dev, "ti,sci-dev-id", &tisci_rm->tisci_dev_id);
if (ret) {
dev_err(dev, "ti,sci-dev-id read failure %d\n", ret);
return ret;
}
tisci_rm->tisci_navss_dev_id = -1;
ret = ofnode_read_u32(navss_ofnode, "ti,sci-dev-id",
&tisci_rm->tisci_navss_dev_id);
if (ret) {
dev_err(dev, "navss sci-dev-id read failure %d\n", ret);
return ret;
}
tisci_rm->tisci_udmap_ops = &tisci_rm->tisci->ops.rm_udmap_ops;
tisci_rm->tisci_psil_ops = &tisci_rm->tisci->ops.rm_psil_ops;
if (ud->match_data->type == DMA_TYPE_UDMA) {
ret = uclass_get_device_by_phandle(UCLASS_MISC, dev,
"ti,ringacc", &tmp);
ud->ringacc = dev_get_priv(tmp);
} else {
struct k3_ringacc_init_data ring_init_data;
ring_init_data.tisci = ud->tisci_rm.tisci;
ring_init_data.tisci_dev_id = ud->tisci_rm.tisci_dev_id;
if (ud->match_data->type == DMA_TYPE_BCDMA) {
ring_init_data.num_rings = ud->bchan_cnt +
ud->tchan_cnt +
ud->rchan_cnt;
} else {
ring_init_data.num_rings = ud->rflow_cnt +
ud->tflow_cnt;
}
ud->ringacc = k3_ringacc_dmarings_init(dev, &ring_init_data);
}
if (IS_ERR(ud->ringacc))
return PTR_ERR(ud->ringacc);
ud->dev = dev;
ret = setup_resources(ud);
if (ret < 0)
return ret;
ud->ch_count = ret;
for (i = 0; i < ud->bchan_cnt; i++) {
struct udma_bchan *bchan = &ud->bchans[i];
bchan->id = i;
bchan->reg_rt = ud->mmrs[MMR_BCHANRT] + i * 0x1000;
}
for (i = 0; i < ud->tchan_cnt; i++) {
struct udma_tchan *tchan = &ud->tchans[i];
tchan->id = i;
tchan->reg_chan = ud->mmrs[MMR_TCHAN] + UDMA_CH_100(i);
tchan->reg_rt = ud->mmrs[MMR_TCHANRT] + UDMA_CH_1000(i);
}
for (i = 0; i < ud->rchan_cnt; i++) {
struct udma_rchan *rchan = &ud->rchans[i];
rchan->id = i;
rchan->reg_chan = ud->mmrs[MMR_RCHAN] + UDMA_CH_100(i);
rchan->reg_rt = ud->mmrs[MMR_RCHANRT] + UDMA_CH_1000(i);
}
for (i = 0; i < ud->rflow_cnt; i++) {
struct udma_rflow *rflow = &ud->rflows[i];
rflow->id = i;
rflow->reg_rflow = ud->mmrs[MMR_RFLOW] + UDMA_CH_40(i);
}
for (i = 0; i < ud->ch_count; i++) {
struct udma_chan *uc = &ud->channels[i];
uc->ud = ud;
uc->id = i;
uc->config.remote_thread_id = -1;
uc->bchan = NULL;
uc->tchan = NULL;
uc->rchan = NULL;
uc->config.mapped_channel_id = -1;
uc->config.default_flow_id = -1;
uc->config.dir = DMA_MEM_TO_MEM;
sprintf(uc->name, "UDMA chan%d\n", i);
if (!i)
uc->in_use = true;
}
pr_debug("%s(rev: 0x%08x) CAP0-3: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
dev->name,
udma_read(ud->mmrs[MMR_GCFG], 0),
udma_read(ud->mmrs[MMR_GCFG], 0x20),
udma_read(ud->mmrs[MMR_GCFG], 0x24),
udma_read(ud->mmrs[MMR_GCFG], 0x28),
udma_read(ud->mmrs[MMR_GCFG], 0x2c));
uc_priv->supported = DMA_SUPPORTS_MEM_TO_MEM | DMA_SUPPORTS_MEM_TO_DEV;
return 0;
}
static int udma_push_to_ring(struct k3_nav_ring *ring, void *elem)
{
u64 addr = 0;
@@ -2325,37 +2190,12 @@ static int udma_transfer(struct udevice *dev, int direction,
/* Channel0 is reserved for memcpy */
struct udma_chan *uc = &ud->channels[0];
dma_addr_t paddr = 0;
int ret;
switch (ud->match_data->type) {
case DMA_TYPE_UDMA:
ret = udma_alloc_chan_resources(uc);
break;
case DMA_TYPE_BCDMA:
ret = bcdma_alloc_chan_resources(uc);
break;
default:
return -EINVAL;
};
if (ret)
return ret;
udma_prep_dma_memcpy(uc, dst, src, len);
udma_start(uc);
udma_poll_completion(uc, &paddr);
udma_stop(uc);
switch (ud->match_data->type) {
case DMA_TYPE_UDMA:
udma_free_chan_resources(uc);
break;
case DMA_TYPE_BCDMA:
bcdma_free_bchan_resources(uc);
break;
default:
return -EINVAL;
};
return 0;
}
@@ -2717,6 +2557,177 @@ static int udma_get_cfg(struct dma *dma, u32 id, void **data)
return -EINVAL;
}
static int udma_probe(struct udevice *dev)
{
struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct udma_dev *ud = dev_get_priv(dev);
int i, ret;
struct udevice *tmp;
struct udevice *tisci_dev = NULL;
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
struct udma_chan *uc;
ofnode navss_ofnode = ofnode_get_parent(dev_ofnode(dev));
ud->match_data = (void *)dev_get_driver_data(dev);
ret = udma_get_mmrs(dev);
if (ret)
return ret;
ud->psil_base = ud->match_data->psil_base;
ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
"ti,sci", &tisci_dev);
if (ret) {
debug("Failed to get TISCI phandle (%d)\n", ret);
tisci_rm->tisci = NULL;
return -EINVAL;
}
tisci_rm->tisci = (struct ti_sci_handle *)
(ti_sci_get_handle_from_sysfw(tisci_dev));
tisci_rm->tisci_dev_id = -1;
ret = dev_read_u32(dev, "ti,sci-dev-id", &tisci_rm->tisci_dev_id);
if (ret) {
dev_err(dev, "ti,sci-dev-id read failure %d\n", ret);
return ret;
}
tisci_rm->tisci_navss_dev_id = -1;
ret = ofnode_read_u32(navss_ofnode, "ti,sci-dev-id",
&tisci_rm->tisci_navss_dev_id);
if (ret) {
dev_err(dev, "navss sci-dev-id read failure %d\n", ret);
return ret;
}
tisci_rm->tisci_udmap_ops = &tisci_rm->tisci->ops.rm_udmap_ops;
tisci_rm->tisci_psil_ops = &tisci_rm->tisci->ops.rm_psil_ops;
if (ud->match_data->type == DMA_TYPE_UDMA) {
ret = uclass_get_device_by_phandle(UCLASS_MISC, dev,
"ti,ringacc", &tmp);
ud->ringacc = dev_get_priv(tmp);
} else {
struct k3_ringacc_init_data ring_init_data;
ring_init_data.tisci = ud->tisci_rm.tisci;
ring_init_data.tisci_dev_id = ud->tisci_rm.tisci_dev_id;
if (ud->match_data->type == DMA_TYPE_BCDMA) {
ring_init_data.num_rings = ud->bchan_cnt +
ud->tchan_cnt +
ud->rchan_cnt;
} else {
ring_init_data.num_rings = ud->rflow_cnt +
ud->tflow_cnt;
}
ud->ringacc = k3_ringacc_dmarings_init(dev, &ring_init_data);
}
if (IS_ERR(ud->ringacc))
return PTR_ERR(ud->ringacc);
ud->dev = dev;
ret = setup_resources(ud);
if (ret < 0)
return ret;
ud->ch_count = ret;
for (i = 0; i < ud->bchan_cnt; i++) {
struct udma_bchan *bchan = &ud->bchans[i];
bchan->id = i;
bchan->reg_rt = ud->mmrs[MMR_BCHANRT] + i * 0x1000;
}
for (i = 0; i < ud->tchan_cnt; i++) {
struct udma_tchan *tchan = &ud->tchans[i];
tchan->id = i;
tchan->reg_chan = ud->mmrs[MMR_TCHAN] + UDMA_CH_100(i);
tchan->reg_rt = ud->mmrs[MMR_TCHANRT] + UDMA_CH_1000(i);
}
for (i = 0; i < ud->rchan_cnt; i++) {
struct udma_rchan *rchan = &ud->rchans[i];
rchan->id = i;
rchan->reg_chan = ud->mmrs[MMR_RCHAN] + UDMA_CH_100(i);
rchan->reg_rt = ud->mmrs[MMR_RCHANRT] + UDMA_CH_1000(i);
}
for (i = 0; i < ud->rflow_cnt; i++) {
struct udma_rflow *rflow = &ud->rflows[i];
rflow->id = i;
rflow->reg_rflow = ud->mmrs[MMR_RFLOW] + UDMA_CH_40(i);
}
for (i = 0; i < ud->ch_count; i++) {
struct udma_chan *uc = &ud->channels[i];
uc->ud = ud;
uc->id = i;
uc->config.remote_thread_id = -1;
uc->bchan = NULL;
uc->tchan = NULL;
uc->rchan = NULL;
uc->config.mapped_channel_id = -1;
uc->config.default_flow_id = -1;
uc->config.dir = DMA_MEM_TO_MEM;
sprintf(uc->name, "UDMA chan%d\n", i);
if (!i)
uc->in_use = true;
}
pr_debug("%s(rev: 0x%08x) CAP0-3: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
dev->name,
udma_read(ud->mmrs[MMR_GCFG], 0),
udma_read(ud->mmrs[MMR_GCFG], 0x20),
udma_read(ud->mmrs[MMR_GCFG], 0x24),
udma_read(ud->mmrs[MMR_GCFG], 0x28),
udma_read(ud->mmrs[MMR_GCFG], 0x2c));
uc_priv->supported = DMA_SUPPORTS_MEM_TO_MEM | DMA_SUPPORTS_MEM_TO_DEV;
uc = &ud->channels[0];
ret = 0;
switch (ud->match_data->type) {
case DMA_TYPE_UDMA:
ret = udma_alloc_chan_resources(uc);
break;
case DMA_TYPE_BCDMA:
ret = bcdma_alloc_chan_resources(uc);
break;
default:
break; /* Do nothing in any other case */
};
if (ret)
dev_err(dev, " Channel 0 allocation failure %d\n", ret);
return ret;
}
static int udma_remove(struct udevice *dev)
{
struct udma_dev *ud = dev_get_priv(dev);
struct udma_chan *uc = &ud->channels[0];
switch (ud->match_data->type) {
case DMA_TYPE_UDMA:
udma_free_chan_resources(uc);
break;
case DMA_TYPE_BCDMA:
bcdma_free_bchan_resources(uc);
break;
default:
break;
};
return 0;
}
static const struct dma_ops udma_ops = {
.transfer = udma_transfer,
.of_xlate = udma_of_xlate,
@@ -2855,5 +2866,7 @@ U_BOOT_DRIVER(ti_edma3) = {
.of_match = udma_ids,
.ops = &udma_ops,
.probe = udma_probe,
.remove = udma_remove,
.priv_auto = sizeof(struct udma_dev),
.flags = DM_FLAG_OS_PREPARE,
};