sparc: leon3: Moved GRLIB core header files to common include/grlib directory
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
This commit is contained in:
Daniel Hellstrom
committed by
Francois Retief
Francois Retief
parent
cff009ed6f
commit
f2879f5952
137
include/ambapp.h
137
include/ambapp.h
@@ -222,141 +222,4 @@ char *ambapp_device_id2desc(int vendor, int id);
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#define amba_apb_mask(iobar) ((~(amba_membar_mask(iobar)<<8) & 0x000fffff) + 1)
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/*************************** AMBA Plug&Play device register MAPS *****************/
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/*
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* The following defines the bits in the LEON UART Status Registers.
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*/
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#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
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#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
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#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
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#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
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#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
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#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
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#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
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#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
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/*
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* The following defines the bits in the LEON UART Ctrl Registers.
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*/
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#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
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#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
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#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
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#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
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#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
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#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
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#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
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#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
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#define LEON_REG_UART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
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#define LEON3_GPTIMER_EN 1
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#define LEON3_GPTIMER_RL 2
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#define LEON3_GPTIMER_LD 4
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#define LEON3_GPTIMER_IRQEN 8
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/*
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* The following defines the bits in the LEON PS/2 Status Registers.
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*/
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#define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
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#define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
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#define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
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#define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
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/*
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* The following defines the bits in the LEON PS/2 Ctrl Registers.
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*/
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#define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
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#define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
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#define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive interrupt */
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#define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit interrupt */
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#ifndef __ASSEMBLER__
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typedef struct {
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volatile unsigned int ilevel;
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volatile unsigned int ipend;
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volatile unsigned int iforce;
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volatile unsigned int iclear;
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volatile unsigned int mstatus;
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volatile unsigned int notused[11];
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volatile unsigned int cpu_mask[16];
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volatile unsigned int cpu_force[16];
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} ambapp_dev_irqmp;
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typedef struct {
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volatile unsigned int data;
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volatile unsigned int status;
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volatile unsigned int ctrl;
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volatile unsigned int scaler;
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} ambapp_dev_apbuart;
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typedef struct {
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volatile unsigned int val;
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volatile unsigned int rld;
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volatile unsigned int ctrl;
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volatile unsigned int unused;
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} ambapp_dev_gptimer_element;
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#define LEON3_GPTIMER_CTRL_EN 0x1 /* Timer enable */
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#define LEON3_GPTIMER_CTRL_RS 0x2 /* Timer reStart */
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#define LEON3_GPTIMER_CTRL_LD 0x4 /* Timer reLoad */
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#define LEON3_GPTIMER_CTRL_IE 0x8 /* interrupt enable */
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#define LEON3_GPTIMER_CTRL_IP 0x10 /* interrupt flag/pending */
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#define LEON3_GPTIMER_CTRL_CH 0x20 /* Chain with previous timer */
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typedef struct {
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volatile unsigned int scalar;
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volatile unsigned int scalar_reload;
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volatile unsigned int config;
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volatile unsigned int unused;
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volatile ambapp_dev_gptimer_element e[8];
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} ambapp_dev_gptimer;
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typedef struct {
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volatile unsigned int iodata;
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volatile unsigned int ioout;
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volatile unsigned int iodir;
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volatile unsigned int irqmask;
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volatile unsigned int irqpol;
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volatile unsigned int irqedge;
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} ambapp_dev_ioport;
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typedef struct {
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volatile unsigned int write;
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volatile unsigned int dummy;
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volatile unsigned int txcolor;
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volatile unsigned int bgcolor;
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} ambapp_dev_textvga;
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typedef struct {
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volatile unsigned int data;
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volatile unsigned int status;
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volatile unsigned int ctrl;
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} ambapp_dev_apbps2;
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typedef struct {
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unsigned int mcfg1, mcfg2, mcfg3;
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} ambapp_dev_mctrl;
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typedef struct {
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unsigned int sdcfg;
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} ambapp_dev_sdctrl;
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typedef struct {
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unsigned int cfg1;
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unsigned int cfg2;
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unsigned int cfg3;
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} ambapp_dev_ddr2spa;
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typedef struct {
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unsigned int ctrl;
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unsigned int cfg;
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} ambapp_dev_ddrspa;
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#endif
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#endif
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@@ -27,6 +27,7 @@
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#define VENDOR_ORBITA 0x17
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#define VENDOR_SYNOPSYS 0x21
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#define VENDOR_NASA 0x22
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#define VENDOR_S3 0x31
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#define VENDOR_CAL 0xca
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#define VENDOR_EMBEDDIT 0xea
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#define VENDOR_CETON 0xcb
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@@ -100,11 +101,15 @@
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#define GAISLER_ASCS 0x043
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#define GAISLER_IPMVBCTRL 0x044
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#define GAISLER_SPIMCTRL 0x045
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#define GAISLER_L4STAT 0x047
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#define GAISLER_LEON4 0x048
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#define GAISLER_LEON4DSU 0x049
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#define GAISLER_PWM 0x04a
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#define GAISLER_L2CACHE 0x04b
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#define GAISLER_SDCTRL64 0x04c
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#define GAISLER_GR1553B 0x04d
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#define GAISLER_1553TST 0x04e
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#define GAISLER_GRIOMMU 0x04f
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#define GAISLER_FTAHBRAM 0x050
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#define GAISLER_FTSRCTRL 0x051
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#define GAISLER_AHBSTAT 0x052
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@@ -112,6 +117,8 @@
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#define GAISLER_FTMCTRL 0x054
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#define GAISLER_FTSDCTRL 0x055
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#define GAISLER_FTSRCTRL8 0x056
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#define GAISLER_MEMSCRUB 0x057
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#define GAISLER_FTSDCTRL64 0x058
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#define GAISLER_APBPS2 0x060
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#define GAISLER_VGACTRL 0x061
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#define GAISLER_LOGAN 0x062
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@@ -134,6 +141,7 @@
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#define GAISLER_TEST_1X2 0x078
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#define GAISLER_WILD2AHB 0x079
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#define GAISLER_BIO1 0x07a
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#define GAISLER_AESDMA 0x07b
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#define GAISLER_SATCAN 0x080
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#define GAISLER_CANMUX 0x081
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#define GAISLER_GRTMRX 0x082
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@@ -143,6 +151,9 @@
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#define GAISLER_GEFFE 0x086
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#define GAISLER_GPREG 0x087
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#define GAISLER_GRTMPAHB 0x088
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#define GAISLER_SPWCUC 0x089
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#define GAISLER_SPW2_DMA 0x08a
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#define GAISLER_SPWROUTER 0x08b
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/* European Space Agency device ID defines */
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#define ESA_LEON2 0x002
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47
include/grlib/apbuart.h
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47
include/grlib/apbuart.h
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@@ -0,0 +1,47 @@
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/* GRLIB APBUART definitions
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*
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* (C) Copyright 2010, 2015
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __GRLIB_APBUART_H__
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#define __GRLIB_APBUART_H__
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/* APBUART Register map */
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typedef struct {
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volatile unsigned int data;
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volatile unsigned int status;
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volatile unsigned int ctrl;
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volatile unsigned int scaler;
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} ambapp_dev_apbuart;
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/*
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* The following defines the bits in the LEON UART Status Registers.
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*/
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#define APBUART_STATUS_DR 0x00000001 /* Data Ready */
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#define APBUART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
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#define APBUART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
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#define APBUART_STATUS_BR 0x00000008 /* Break Error */
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#define APBUART_STATUS_OE 0x00000010 /* RX Overrun Error */
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#define APBUART_STATUS_PE 0x00000020 /* RX Parity Error */
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#define APBUART_STATUS_FE 0x00000040 /* RX Framing Error */
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#define APBUART_STATUS_ERR 0x00000078 /* Error Mask */
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/*
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* The following defines the bits in the LEON UART Ctrl Registers.
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*/
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#define APBUART_CTRL_RE 0x00000001 /* Receiver enable */
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#define APBUART_CTRL_TE 0x00000002 /* Transmitter enable */
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#define APBUART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
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#define APBUART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
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#define APBUART_CTRL_PS 0x00000010 /* Parity select */
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#define APBUART_CTRL_PE 0x00000020 /* Parity enable */
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#define APBUART_CTRL_FL 0x00000040 /* Flow control enable */
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#define APBUART_CTRL_LB 0x00000080 /* Loop Back enable */
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#define APBUART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
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#endif
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34
include/grlib/gptimer.h
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34
include/grlib/gptimer.h
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@@ -0,0 +1,34 @@
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/* GRLIB GPTIMER (General Purpose Timer) definitions
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*
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* (C) Copyright 2010, 2015
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __GRLIB_GPTIMER_H__
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#define __GRLIB_GPTIMER_H__
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typedef struct {
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volatile unsigned int val;
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volatile unsigned int rld;
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volatile unsigned int ctrl;
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volatile unsigned int unused;
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} ambapp_dev_gptimer_element;
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#define GPTIMER_CTRL_EN 0x1 /* Timer enable */
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#define GPTIMER_CTRL_RS 0x2 /* Timer reStart */
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#define GPTIMER_CTRL_LD 0x4 /* Timer reLoad */
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#define GPTIMER_CTRL_IE 0x8 /* interrupt enable */
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#define GPTIMER_CTRL_IP 0x10 /* interrupt flag/pending */
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#define GPTIMER_CTRL_CH 0x20 /* Chain with previous timer */
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typedef struct {
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volatile unsigned int scalar;
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volatile unsigned int scalar_reload;
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volatile unsigned int config;
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volatile unsigned int unused;
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volatile ambapp_dev_gptimer_element e[8];
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} ambapp_dev_gptimer;
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#endif
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87
include/grlib/greth.h
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87
include/grlib/greth.h
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@@ -0,0 +1,87 @@
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/* Gaisler.com GRETH 10/100/1000 Ethernet MAC definitions
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*
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* (C) Copyright 2010, 2015
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __GRLIB_GRETH_H__
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#define __GRLIB_GRETH_H__
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#define GRETH_FD 0x10
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#define GRETH_RESET 0x40
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#define GRETH_MII_BUSY 0x8
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#define GRETH_MII_NVALID 0x10
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/* MII registers */
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#define GRETH_MII_EXTADV_1000FD 0x00000200
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#define GRETH_MII_EXTADV_1000HD 0x00000100
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#define GRETH_MII_EXTPRT_1000FD 0x00000800
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#define GRETH_MII_EXTPRT_1000HD 0x00000400
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#define GRETH_MII_100T4 0x00000200
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#define GRETH_MII_100TXFD 0x00000100
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#define GRETH_MII_100TXHD 0x00000080
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#define GRETH_MII_10FD 0x00000040
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#define GRETH_MII_10HD 0x00000020
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#define GRETH_BD_EN 0x800
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#define GRETH_BD_WR 0x1000
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#define GRETH_BD_IE 0x2000
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#define GRETH_BD_LEN 0x7FF
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#define GRETH_TXEN 0x1
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#define GRETH_INT_TX 0x8
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#define GRETH_TXI 0x4
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#define GRETH_TXBD_STATUS 0x0001C000
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#define GRETH_TXBD_MORE 0x20000
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#define GRETH_TXBD_IPCS 0x40000
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#define GRETH_TXBD_TCPCS 0x80000
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#define GRETH_TXBD_UDPCS 0x100000
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#define GRETH_TXBD_ERR_LC 0x10000
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#define GRETH_TXBD_ERR_UE 0x4000
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#define GRETH_TXBD_ERR_AL 0x8000
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#define GRETH_TXBD_NUM 128
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#define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1)
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#define GRETH_TX_BUF_SIZE 2048
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#define GRETH_INT_RX 0x4
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#define GRETH_RXEN 0x2
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#define GRETH_RXI 0x8
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#define GRETH_RXBD_STATUS 0xFFFFC000
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#define GRETH_RXBD_ERR_AE 0x4000
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#define GRETH_RXBD_ERR_FT 0x8000
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#define GRETH_RXBD_ERR_CRC 0x10000
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#define GRETH_RXBD_ERR_OE 0x20000
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#define GRETH_RXBD_ERR_LE 0x40000
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#define GRETH_RXBD_IP_DEC 0x80000
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#define GRETH_RXBD_IP_CSERR 0x100000
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#define GRETH_RXBD_UDP_DEC 0x200000
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#define GRETH_RXBD_UDP_CSERR 0x400000
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#define GRETH_RXBD_TCP_DEC 0x800000
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#define GRETH_RXBD_TCP_CSERR 0x1000000
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#define GRETH_RXBD_NUM 128
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#define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1)
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#define GRETH_RX_BUF_SIZE 2048
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/* Ethernet configuration registers */
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typedef struct _greth_regs {
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volatile unsigned int control;
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volatile unsigned int status;
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volatile unsigned int esa_msb;
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volatile unsigned int esa_lsb;
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volatile unsigned int mdio;
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volatile unsigned int tx_desc_p;
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volatile unsigned int rx_desc_p;
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volatile unsigned int edcl_ip;
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} greth_regs;
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/* Ethernet buffer descriptor */
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typedef struct _greth_bd {
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volatile unsigned int stat;
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unsigned int addr; /* Buffer address not changed by HW */
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} greth_bd;
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#endif
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23
include/grlib/irqmp.h
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23
include/grlib/irqmp.h
Normal file
@@ -0,0 +1,23 @@
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/* GRLIB IRQMP (IRQ Multi-processor controller) definitions
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*
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* (C) Copyright 2010, 2015
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __GRLIB_IRQMP_H__
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#define __GRLIB_IRQMP_H__
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typedef struct {
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volatile unsigned int ilevel;
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volatile unsigned int ipend;
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volatile unsigned int iforce;
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volatile unsigned int iclear;
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volatile unsigned int mstatus;
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volatile unsigned int notused[11];
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volatile unsigned int cpu_mask[16];
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volatile unsigned int cpu_force[16];
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} ambapp_dev_irqmp;
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#endif
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