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configs: j7200_evm_a72_defconfig: Enable configs for PCI support

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TI's J7200 SoC has a single instance of PCIe Controller namely PCIe1 which
is a Cadence PCIe Controller. To support PCIe functionality with the PCIe1
instance of PCIe, enable the corresponding configs.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
This commit is contained in:
Siddharth Vadapalli
2024-10-14 11:09:24 +05:30
committed by Tom Rini
parent 59ad548009
commit f3e1aaddb4
1 changed files with 5 additions and 0 deletions
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5
configs/j7200_evm_a72_defconfig
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@@ -32,6 +32,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_PCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
@@ -71,6 +72,7 @@ CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_UFS=y
CONFIG_CMD_USB=y
@@ -153,6 +155,9 @@ CONFIG_MUX_MMIO=y
CONFIG_PHY_TI_DP83869=y
CONFIG_PHY_FIXED=y
CONFIG_TI_AM65_CPSW_NUSS=y
CONFIG_NVME_PCI=y
CONFIG_PCI_CONFIG_HOST_BRIDGE=y
CONFIG_PCIE_CDNS_TI=y
CONFIG_PHY=y
CONFIG_SPL_PHY=y
CONFIG_PHY_CADENCE_TORRENT=y