sf: Add dual memories support - DUAL_STACKED
This patch added support for accessing dual memories in stacked connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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@@ -30,6 +30,7 @@
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#define SPI_XFER_MMAP 0x08 /* Memory Mapped start */
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#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */
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#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
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#define SPI_XFER_U_PAGE (1 << 5)
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/* SPI TX operation modes */
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#define SPI_OPM_TX_QPP 1 << 0
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@@ -44,6 +45,9 @@
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SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \
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SPI_OPM_RX_QIOF
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/* SPI bus connection options */
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#define SPI_CONN_DUAL_SHARED 1 << 0
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/* Header byte that marks the start of the message */
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#define SPI_PREAMBLE_END_BYTE 0xec
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@@ -62,6 +66,8 @@
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* @max_write_size: If non-zero, the maximum number of bytes which can
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* be written at once, excluding command bytes.
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* @memory_map: Address of read-only SPI flash access.
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* @option: Varies SPI bus options - separate bus.
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* @flags: Indication of SPI flags.
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*/
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struct spi_slave {
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unsigned int bus;
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@@ -71,6 +77,8 @@ struct spi_slave {
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unsigned int wordlen;
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unsigned int max_write_size;
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void *memory_map;
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u8 option;
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u8 flags;
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};
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/**
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