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pci: auto: Reduce bridge mem alignment boundary for boston

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Boston has a very limited memory range for PCI controllers, where
1MB can't easily fit into it.

Make alignment boundary of PCI memory resource allocation a Kconfig
option and default to 0x10000 for boston.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This commit is contained in:
Jiaxun Yang
2024-05-17 19:14:50 +01:00
committed by Tom Rini
parent cb5af7aa4f
commit fc25cd0e1a
2 changed files with 17 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/pci/Kconfig
View File

@@ -75,6 +75,15 @@ config PCI_MAP_SYSTEM_MEMORY
This should only be required on MIPS where CFG_SYS_SDRAM_BASE is still
being used as virtual address.
config PCI_BRIDGE_MEM_ALIGNMENT
hex "Alignment boundary of PCI memory resource allocation"
default 0x10000 if TARGET_BOSTON
default 0x100000
help
Specify a boundary for alignment of PCI memory resource allocation,
this is normally 0x100000 (1MB) but can be reduced to accommodate
hardware with tight bridge range if hardware allows.
config PCI_SRIOV
bool "Enable Single Root I/O Virtualization support for PCI"
help

16
drivers/pci/pci_auto.c
View File

@@ -372,8 +372,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
/* Round memory allocator to 1MB boundary */
pciauto_region_align(pci_mem, 0x100000);
/* Round memory allocator */
pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
/*
* Set up memory and I/O filter limits, assume 32-bit
@@ -387,8 +387,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
}
if (pci_prefetch) {
/* Round memory allocator to 1MB boundary */
pciauto_region_align(pci_prefetch, 0x100000);
/* Round memory allocator */
pciauto_region_align(pci_prefetch, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
/*
* Set up memory and I/O filter limits, assume 32-bit
@@ -465,8 +465,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr));
if (pci_mem) {
/* Round memory allocator to 1MB boundary */
pciauto_region_align(pci_mem, 0x100000);
/* Round memory allocator */
pciauto_region_align(pci_mem, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
dm_pci_write_config16(dev, PCI_MEMORY_LIMIT,
((pci_mem->bus_lower - 1) >> 16) &
@@ -480,8 +480,8 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus)
&prefechable_64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
/* Round memory allocator to 1MB boundary */
pciauto_region_align(pci_prefetch, 0x100000);
/* Round memory allocator */
pciauto_region_align(pci_prefetch, CONFIG_PCI_BRIDGE_MEM_ALIGNMENT);
dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT,
(((pci_prefetch->bus_lower - 1) >> 16) &