colin/u-boot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Revert "riscv: cpu: fu740: clear feature disable CSR"

Browse Source 
This reverts commit bc8bbb77f7.

This commit breaks U-Boot booting on SiFive Unleashed board, as
there is no such CSR on U54 core.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit is contained in:
Bin Meng
2021-05-10 17:08:16 +08:00
committed by Leo Yu-Chi Liang
parent cc25f346c9
commit ffdc71bc09
1 changed files with 0 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
arch/riscv/cpu/fu540/spl.c
View File

@@ -6,9 +6,6 @@
#include <dm.h> #include <dm.h>
#include <log.h> #include <log.h>
#include <asm/csr.h>
#define CSR_U74_FEATURE_DISABLE 0x7c1
int spl_soc_init(void) int spl_soc_init(void)
{ {
@@ -24,15 +21,3 @@ int spl_soc_init(void)
return 0; return 0;
} }
void harts_early_init(void)
{
/*
* Feature Disable CSR
*
* Clear feature disable CSR to '0' to turn on all features for
* each core. This operation must be in M-mode.
*/
if (CONFIG_IS_ENABLED(RISCV_MMODE))
csr_write(CSR_U74_FEATURE_DISABLE, 0);
}