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11 Commits

Author SHA1 Message Date
Simon Glass
f1a485aa40 dm: socfpga: mmc: Support CONFIG_BLK 
Update the driver to support using driver model for block devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2016-07-27 14:15:54 -06:00
Simon Glass
cffe5d86cf dm: mmc: Set up the device pointer when using the MMC uclass 
Update the existing drivers to set up this new pointer. This will be required
by the MMC uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2016-05-17 09:54:43 -06:00
Marek Vasut
dafd5792a8 arm: socfpga: Nuke useless include 
The dwmmc.h include was forgotten during the migration of dwmmc
probing to DM. Since the shiny DM is in place now, remove this
relic of the past.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
 2016-04-10 17:19:49 +02:00
Dinh Nguyen
a1684b6105 arm: socfpga: fix up a questionable macro for SDMMC 
Move the macro into the socfpga_dwmci_clksel().

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Marek Vasut <marex@denx.de>
[fix parenthesis in the sdmmc_mask]
 2015-12-20 03:44:56 +01:00
Marek Vasut
c35ed77a78 mmc: dwmmc: socfpga: Convert to DM 
Convert the SoCFPGA shim for registering the DWMMC driver to DM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
 2015-12-07 00:15:59 +01:00
Chin Liang See
9a41404dc6 mmc: socfpga_dw_mmc: Move drvsel and smplsel to dts 
socfpga_dw_mmc driver will obtain the drvsel and
smplsel value from device tree instead of definition
in config header file.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
 2015-11-30 13:30:19 +01:00
Marek Vasut
129adf5bf4 mmc: dw_mmc: Probe the MMC from OF 
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.

This patch now also removes previous temporary workaround.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
 2015-09-04 11:54:20 +02:00
Pavel Machek
498d1a62db arm: socfpga: mmc: Pick the clock from clock manager 
Make the SoCFPGA MMC stub pick clock via the clock manager
frequency accessors instead of hard-coding the frequency.

Also fix calloc() misuse.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
 2014-10-06 17:46:49 +02:00
Pavel Machek
7860649716 socfpga: cleanup socfpga_dw_mmc 
Cleanups as suggested by wd on mailing list.

Signed-off-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
 2014-08-30 07:46:38 -04:00
Pavel Machek
51fb455f82 socfpga: fix clock manager register definition 
Structure defining clock manager hardware was wrong, leading to
wrong registers being accessed and hang in MMC init.

This fixes structure to match hardware.

Signed-off-by: Pavel Machek <pavel@denx.de>
 2014-08-29 15:50:50 -04:00
Chin Liang See
c5c1af2176 socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA 
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
 2014-01-09 11:53:55 +02:00