These functions are part of the Linux 4.6 sync. They are being added
before the main sync patch in order to make it easier to address the
issue across all NAND drivers (many/most of which do not closely track
their Linux counterparts) separately from other merge issues.
Signed-off-by: Scott Wood <oss@buserror.net>
Claim the MPP pins for the NAND flash controller only when it's actually
being used. This allows the pins to be shared with the SPI interface
which already supports an equivalent on-access MPP reconfiguration.
Reviewed-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Scott Wood <oss@buserror.net>
Signed-off-by: Stefan Roese <sr@denx.de>
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay.
The Data Transfer from Cell to Register is >= 35us. Other Vendors
and older chips normally use >= 25us. To have enough margin 40us
is selected.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
