3 Commits

Author	SHA1	Message	Date
York Sun	1e6ad55c05	armv8/cache: Change cache invalidate and flush function ... When SoC first boots up, we should invalidate the cache but not flush it. We can use the same function for invalid and flush mostly, with a wrapper. Invalidating large cache can ben slow on emulator, so we postpone doing so until I-cache is enabled, and before enabling D-cache. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>	2014-04-07 17:43:41 +02:00
York Sun	f5222cfd49	armv8/cache: Consolidate setting for MAIR and TCR ... Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>	2014-04-07 17:43:32 +02:00
David Feng	0ae7653128	arm64: core support ... Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>	2014-01-09 16:08:44 +01:00