Marek Vasut
|
2110eeaf0f
|
arm: socfpga: timer: Pull the timer reload value from config file
The timer reload value is a property of the timer hardware and there
is no reason for this to be configurable. Place this into the timer
driver just like on the other hardware.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
|
2014-10-06 17:46:49 +02:00 |
|
Rob Herring
|
23ab7ee0ff
|
ARM: socfpga: convert to common timer code
Convert socfpga to use the commmon timer code.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
|
2013-11-04 11:23:45 -05:00 |
|
Wolfgang Denk
|
1a4596601f
|
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
|
2013-07-24 09:44:38 -04:00 |
|
Simon Glass
|
582601da2f
|
arm: Move lastinc to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
2013-02-01 15:07:50 -05:00 |
|
Simon Glass
|
66ee692347
|
arm: Move tbl to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
2013-02-01 15:07:50 -05:00 |
|
Dinh Nguyen
|
777544085d
|
ARM: Add Altera SOCFPGA Cyclone5
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Chin Liang See <clsee@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Tom Trini <trini@ti.com>
Cc: Wolfgang Denx <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
----
v8: Remove no_return attribute for reset_cpu
Based on v2012.10-rc2
|
2012-10-04 18:11:52 +02:00 |
|