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Author	SHA1	Message	Date
Stefan Roese	b0f4ba0242	mips: octeon: Misc changes required because of the newly added headers With the newly added headers and their restructuring (which macro is defined where), some changes in the already existing Octeon files are necessary. This patch makes the necessary changes. Signed-off-by: Stefan Roese <sr@denx.de>	2021-04-23 21:03:24 +02:00
Aaron Williams	61674a17bc	ram: octeon: Add MIPS Octeon3 DDR4 support (part 2/3) This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot repository. It currently supports DDR4 on Octeon 3. It can be later extended to support also DDR3 and Octeon 2 platforms. Part 2 includes the very complex Octeon 3 DDR4 configuration Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>	2020-10-07 20:25:57 +02:00

Author

SHA1

Message

Date

Stefan Roese

b0f4ba0242

mips: octeon: Misc changes required because of the newly added headers

With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.

Signed-off-by: Stefan Roese <sr@denx.de>

2021-04-23 21:03:24 +02:00

Aaron Williams

61674a17bc

ram: octeon: Add MIPS Octeon3 DDR4 support (part 2/3)

This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.

Part 2 includes the very complex Octeon 3 DDR4 configuration

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>

2020-10-07 20:25:57 +02:00

2 Commits