Commit Graph

1 Commits

Author SHA1 Message Date
Enrico Leto
a5eca322f4 siemens: add ddr signal integrity test
The signal integrity test generates pattern on DDR lines
for certification. The signals must be as fast as possible
and unidirectional.

The test is required from our HW team. The available
u-boot memory test doesn't full fill the our requirements.

The test is planed to be used in all new siemens boards.

Signed-off-by: Enrico Leto <enrico.leto@siemens.com>

Signed-off-by: Heiko Schocher <hs@denx.de>
2024-11-25 23:07:37 -03:00