As the per the ID tabl the flash is under Uniform 64-kB sector
architecture, hence updated with proper name.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This patch adds a print messages while using 'sf read' and
'sf write' commands to make sure that how many bytes read/written
from/into flash device.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Tom Rini <trini@ti.com>
This patch adds a print messages while using 'sf erase' command
to make sure that how many bytes erased in flash device.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Tom Rini <trini@ti.com>
Missing return after memcpy is done for memory-mapped SPI flashes,
hence added retun 0 after memcpy done.
The return is missing in below patch
"sf: Enable FDT-based configuration and memory mapping"
(sha1: bb8215f437)
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add support for Winbond W25Q256 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash
memory have the same device ID and Memory architecture. So they can
use the same config parameters.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structure changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for Winbond's W25Q64W SPI flash.
This device is used on xilinx zynq emulation platform.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch corrected the first byte of idcode1 for S25FL256S SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Commit a4ed3b6 "sf: inline data constants" modified winbond.c's page_size
from 256 to 4096. This prevents either/both of "sf write" writing the
correct data, or "sf read" from reading the correct data back.
This allows U-Boot running on Compulab Tegra to upgrade itself.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Adds support for Numonyx's N25Q128 SPI flash. These devices
are used on (among others) Avnet Spartan-6 LX9 micro-evaluation
boards. Tested with "sf" commands and CONFIG_ENV_IS_IN_SPI_FLASH.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
There are more than the M25Pxx serial flashs that can be
used with the stmicro driver, for example: the M25PXxx or
N25Qxx serie. All these chips have burned in the original
stmicro manufacture id 0x20 together with a standard
two-byte signature.
In preperation to support all these chips the stmicro driver
have to decode the full two-byte signature.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
SMDK EVT1 has a different Winbond part, added its part details
to the SPI flash table.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Note: because 4-byte addressing is not supported yet,
at the moment only the first 16MiB of the device are available.
Signed-off-by: Jérôme Carretero <cJ@zougloub.eu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The only two drivers to write the status register do it in the same
way, so unify the implementations. This also makes the block unlock
logic the same.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The local sst enable/disable write funcs don't really add anything
over the common API, so just inline the common calls directly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Analysis of the flash drivers shows that they all use 0x20 if the erase
size is 4KiB, or 0xd8 if it's larger. So with this info in hand, we can
unify all the erase functionality in one place.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
I imagine much of these constants are due to copy & pasting previous
drivers rather than an actual reflection of the hardware layout. At
any rate, inline the info that we don't care about externally as it
shrinks things nicely.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
In an effort to unify the spi flash drivers further, drop all the
unused and/or duplicate command defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Every board currently defines this to the same value, so just default
to that to avoid having to make everyone do the same thing.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We want to show the length, so multiplying by sector size makes no sense.
This is a hold over from the erase code before the big refactor.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
On some systems, we get a warning when %lu is used with size_t's, so
use the correct format string.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
