In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
add spi alias for qspi so that spi probes the device and driver
successfully.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Remove 'cpu' node in device tree for QEMU targets, and let U-Boot detect
and fix up those information at runtime.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Currently, when booting with more that one CPU enabled, U-Boot scans
'cpu' node in device tree and calculates CPU number. This does not scale
well as changing CPU number also requires modifying .dts and re-compiling
U-Boot.
This patch uses fw_cfg interface provided by QEMU to detect online CPU
number at runtime, and dynamically adds 'cpu' device to U-Boot's driver
model.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Add a cpu uclass driver for qemu. Previously, the qemu target gets cpu
number from board dts files, which are manually created at compile time.
This does not scale when more cpus are assigned to guest as the dts files
must be modified as well.
This patch adds a cpu uclass driver for qemu targets to directly read
online cpu number from firmware.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The QEMU fw_cfg interface allows the guest to retrieve various data
information from QEMU. For example, APCI/SMBios tables, number of online
cpus, kernel data and command line, etc.
This patch adds support for QEMU fw_cfg interface.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
In the 'fsp hob' command output, decimal numbers and hexadecimal
numbers are used mixedly. Now change to always use hex numbers
to keep consistency.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This adds microcode blobs created from Intel FSP package for the
Chief River platform. They are for all the Ivy Bridge steppings:
306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the
306a9 which is already in the U-Boot tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
fsp_init() runtime buffer parameter might be different across
different platforms. Move this to update_fsp_configs().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
All FSP spec v1.0 complaint FSP binary uses struct fspinit_rtbuf
as defined by the 1.0 spec, however there are FSPs that does not
follow 1.0 spec (possible due to that FSP predates the 1.0 spec),
and future FSP binary that is complaint to v1.1 spec defines an
optional paltform-specific runtime data in the struct fspinit_rtbuf.
Hence move the definition to chipset header.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Not every FSP supports UPD, thus we introduce a Kconfig option
CONFIG_FSP_USE_UPD and use it to wrap these common UPD handling
codes in fsp_support.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
To support platform-specific configurations (might not always be
UPD on some platform), use a better name update_fsp_configs() and
accepct struct fsp_config_data as its parameter so that platform
codes can handle whatever configuration data for that FSP.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
FSP has several config data like UPD, HDA verb table which can be
overridden or provided by bootloader. Currently in U-Boot only UPD
is handled via struct shared_data. To accommodate any platform, we
rename shared_data to fsp_config_data and move the definition from
common place fsp_support.h to platform-specific place fsp_configs.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Declare stack_top as u32 in struct shared_data and struct common_buf
so that we can avoid casting in fsp_init().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
There is no need to pass shared_data to fsp_continue() so we can
remove unnecessary codes that simplifies the function a lot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Coverity notes that we do not ensure when we copy ifname we still have
space left to ensure NULL termination. As cannot control the size of
ifr_name we must make sure that our argument will not overflow the
buffer.
Reported-by: Coverity (CID 131094)
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rather than using a new debug UART implementation, use the standard one
provided by U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
At present pci_mmc_init() does not correctly use the PCI function since the
list it passes is not terminated. The array size passed to pci_mmc_init() is
actually not used correctly. Fix this and adjust the pci_mmc_init() to scan
all available MMC devices.
Adjust this code to use the new driver model PCI API.
This should move over to the new MMC uclass at some point.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adjust all Tegra boards to use driver model for Ethernet, now that the
required drivers are converted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adjust this code to use driver model for devices where possible. Since
existing users have not been converted the old code must remain.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Use the driver-model PCI functions here where possible. For now we have to
search for the device with pci_bus_find_bdf() but at some point we can put
this in a proper driver and avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The ProXstream2/PH1-LD6b is integrated with a new IP for DDR PHY
which is not register-compatible with the former SoCs.
Add a new command to support the register dump of this IP.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
As mentioned in the log of commit 019df879a9 (ARM: uniphier: add
ProXstream2 and PH1-LD6b support), the DRAM init code was missing
for a long time. Finally, here it is. SPL works now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
These headers are only included locally in arch/arm/mach-uniphier/.
There is no reason to export them by putting in the mach/ directory.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This command shows the boot mode pins, so it would be more at home
in the boot-mode subdirectory.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This command shows the register dump of the DDR PHY, so it would be
more at home in the dram subdirectory.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
On these platforms we have many cases of boards that enable device model
and GPIO support but do not enable OF_CONTROL and pass in a device tree
with the binary. We need to bring in the platform data here as well.
Tested on Beaglebone Black.
Reported-by: Robert Nelson <robertcnelson@gmail.com>
Reported-by: Francisco Aguerre <franciscoaguerre@gmail.com>
Reported-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
since:
commit: f05ad9ba "Add a way to skip relocation"
tqm5200s board fails to boot. Reason is that
board_init_f has a function parameter bootflag,
which is not setup in
in arch/powerpc/cpu/mpc5xxx/start.S _start
So board_init_f gets a undefined bootflag,
currently the gd pointer address. Unfortunately
this address sets the GD_FLG_SKIP_RELOC bit,
so u-boot code gets not relocated and u-boot
does not boot ...
Init bootflag with 0, and tqm5200 boots fine again.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
Check for bmode before reading the boot device
to check if a serial downloader is started,
and returns UART if the serial downloader is set,
letting SPL to wait for an image if
CONFIG_SPL_YMODEM_SUPPORT is set.
This allows to load again a SPL based board
with imx_usb_loader together with a tool
such as kermit.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Fabio Estevam <Fabio.Estevam@freescale.com>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Tested-by: Eric Nelson <eric@nelint.com>
For some board designs, it might be useful to switch the DC-DC
clock source to something else rather the default 24 MHz, e.g.
for EMI reasons.
For this, override the mxs_power_setup_dcdc_clocksource function
in your board support files.
Example:
void mxs_power_setup_dcdc_clocksource(void)
{
mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ);
}
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
