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3 Commits

Author SHA1 Message Date
Ley Foon Tan
38229994af arm: socfpga: Move Stratix10 and Agilex clock manager common code 
Move Stratix10 and Agilex clock manager common code to new header file.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
 2020-01-07 14:38:33 +01:00
Ley Foon Tan
94172c7961 arm: socfpga: Convert clock manager from struct to defines 
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.

Change to get clock manager base address from DT node instead of using
#define.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
 2020-01-07 14:38:33 +01:00
Ley Foon Tan
508791a035 arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC 
Add Clock Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2018-05-18 10:30:47 +02:00