2 Commits

Author	SHA1	Message	Date
Michal Simek	47446a3c66	arm: zynq: Remove low level UART setting ... There is no reason to do serial initializationin low level code. Uart driver does it already based on DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2020-01-14 09:05:53 +01:00
Michal Simek	6bfe3fffac	arm: zynq: Add support for DLC20 board ... Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB), USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each). Boards have mix of Winbond/ST QSPIs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2018-10-16 14:58:45 +02:00