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2 Commits

Author SHA1 Message Date
Xu Ziyuan
85c91cb694 rockchip: clk: rk3328: add ciu_clk entry for eMMC/SDMMC 
The genunie bus clock is sclk_x for eMMC/SDMMC, add support for it.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
 2017-05-10 13:37:21 -06:00
Kever Yang
41793000d7 rockchip: rk3328: add clock driver 
Add rk3328 clock driver and cru structure definition.

Signed-off-by: William Zhang <william.zhang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
 2017-03-16 16:03:46 -06:00