Files
u-boot/arch/arm/dts
Marek Vasut 64eeb15854 ARM: dts: socfpga: Adjust NAND register layout on Arria10
Adjust the NAND register size on Arria10 to reflect reality.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-25 00:13:32 +02:00
..
2017-11-30 08:25:06 +01:00
2018-04-06 16:11:09 -04:00
2015-08-14 08:37:36 +02:00
2018-02-04 12:00:58 +01:00
2018-02-04 12:00:58 +01:00
2016-10-26 16:53:16 +02:00
2017-05-18 11:24:33 +02:00
2018-06-27 09:07:55 +02:00
2018-07-09 15:25:35 -04:00
2017-03-14 20:40:21 -04:00
2017-04-21 09:23:27 +02:00