xypron.glpk@gmx.de 0e0de24b07 ddr: fsl: incorrect logical constraint in populate_memctl_options ...

(pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40)
is always true.

We should use && here.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>

2017-04-18 10:29:24 -04:00

..

altera

arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig

2017-04-14 14:06:57 +02:00

fsl

ddr: fsl: incorrect logical constraint in populate_memctl_options

2017-04-18 10:29:24 -04:00

marvell

…

microchip

…

Kconfig

arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig

2017-04-14 14:06:57 +02:00