Mugunthan V N 3465f807d4 omap4: i2c: correct register offset for sync register ...

The register offset of i2c_sysc offset is not correct as per
omap4 TRM [1], correct the offsets as per the documentation.

[1] - http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

2016-07-26 08:39:10 +02:00

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clock.h

omap4: Properly enable USB PHY clocks

2016-03-15 15:12:50 -04:00

cpu.h

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ehci.h

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gpio.h

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hardware.h

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i2c.h

omap4: i2c: correct register offset for sync register

2016-07-26 08:39:10 +02:00

mem.h

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mmc_host_def.h

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mux_omap4.h

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omap.h

omap4: Reboot mode support

2016-03-15 15:12:53 -04:00

spl.h

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sys_proto.h

omap-common: Rename set_muxconf_regs_essential to set_muxconf_regs

2016-03-15 15:12:06 -04:00