Files
u-boot/board/freescale
Stefan Agner 56d83d1c04 arm: vf610: add DDR_SEL_PAD_CONTR register
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2014-05-25 15:46:12 +02:00
..
2014-05-13 08:20:31 -07:00
2013-11-27 09:39:21 +01:00
2013-11-27 09:39:21 +01:00