46263f2de4
This commit adapts the files that were derived from PIBS (PowerPC Initialization and Boot Software) codeto using SPDX License Identifiers. So far, SPDX has not assigned an official License ID for the PIBS license yet, so this should be considered preliminary. Note that the following files contained incorrect license information: arch/powerpc/cpu/ppc4xx/4xx_uart.c arch/powerpc/cpu/ppc4xx/start.S arch/powerpc/include/asm/ppc440.h These files included, in addition to the GPL-2.0 / ibm-pibs dual license as inherited from PIBS, a GPL-2.0+ license header which was obviously incorrect. This has been removed. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Conflicts: Licenses/README Acked-by: Stefan Roese <sr@denx.de>
91 lines
2.1 KiB
C
91 lines
2.1 KiB
C
/*
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* SPDX-License-Identifier: GPL-2.0 ibm-pibs
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*/
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/*
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* Adapted for PIP405 03.07.01
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* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
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*
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* TODO: Clean-up
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*/
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#include <common.h>
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#include <pci.h>
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#include "isa.h"
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#ifdef CONFIG_405GP
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#ifdef CONFIG_PCI
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DECLARE_GLOBAL_DATA_PTR;
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#include "piix4_pci.h"
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#include "pci_parts.h"
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void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev,
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struct pci_config_table *entry)
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{
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struct pci_pip405_config_entry *table;
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int i;
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table = (struct pci_pip405_config_entry*) entry->priv[0];
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for (i=0; table[i].width; i++)
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{
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#ifdef DEBUG
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printf("Reg 0x%02X Value 0x%08lX Width %02d written\n",
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table[i].index, table[i].val, table[i].width);
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#endif
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switch(table[i].width)
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{
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case 1: pci_hose_write_config_byte(hose, dev, table[i].index, table[i].val); break;
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case 2: pci_hose_write_config_word(hose, dev, table[i].index, table[i].val); break;
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case 4: pci_hose_write_config_dword(hose, dev, table[i].index, table[i].val); break;
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}
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}
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}
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static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
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{
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unsigned char int_line = 0xff;
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unsigned char pin;
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/*
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* Write pci interrupt line register
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*/
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if(PCI_DEV(dev)==0) /* Device0 = PPC405 -> skip */
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return;
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pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
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if ((pin == 0) || (pin > 4))
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return;
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int_line = ((PCI_DEV(dev) + (pin-1) + 10) % 4) + 28;
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pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
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#ifdef DEBUG
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printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n",
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PCI_DEV(dev),dev,int_line,int_line);
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#endif
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}
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extern void pci_405gp_init(struct pci_controller *hose);
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static struct pci_controller hose = {
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config_table: pci_pip405_config_table,
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fixup_irq: pci_pip405_fixup_irq,
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};
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void pci_init_board(void)
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{
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/*we want the ptrs to RAM not flash (ie don't use init list)*/
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hose.fixup_irq = pci_pip405_fixup_irq;
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hose.config_table = pci_pip405_config_table;
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#ifdef DEBUG
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printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n",pci_pip405_fixup_irq,pci_pip405_config_table,hose);
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#endif
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pci_405gp_init(&hose);
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}
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#endif /* CONFIG_PCI */
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#endif /* CONFIG_405GP */
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