Yu Chien Peter Lin 51415fa634 driver: cache: cache-v5l2: Update memory-mapped scheme to support Gen2 platform ...

The L2C configuration register has MAP field to indicate its version
is v0 (Gen1) or v1 (Gen2) L2-cache. This patch makes the driver
compatible with both memory-mapped scheme.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>

2023-02-17 19:07:48 +08:00

..

cache-l2x0.c

cache: l2x0: Fix missing write to Auxiliary Control Register

2020-05-06 15:12:48 -04:00

cache-ncore.c

drivers: cache: ncore: Disable snoop filter

2022-06-17 16:27:05 +08:00

cache-sifive-ccache.c

cache: sifive: Fix -Wint-to-pointer-cast warning

2021-10-20 10:59:09 +08:00

cache-uclass.c

dm: define LOG_CATEGORY for all uclass

2021-07-06 10:38:03 -06:00

cache-v5l2.c

driver: cache: cache-v5l2: Update memory-mapped scheme to support Gen2 platform

2023-02-17 19:07:48 +08:00

Kconfig

riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"

2023-02-17 19:07:48 +08:00

Makefile

cache: add sifive composable cache driver

2021-09-07 10:34:29 +08:00

sandbox_cache.c

WS cleanup: remove SPACE(s) followed by TAB

2021-09-30 09:08:16 -04:00