
Separate BSS is current mandatory on armv8 but this is not useful for early boot phases. Add support for the combined BSS. Use an #ifdef to avoid using CONFIG_SPL_BSS_START_ADDR which is not valid in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
93 lines
1.7 KiB
Plaintext
93 lines
1.7 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2013
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* David Feng <fenghua@phytium.com.cn>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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* Aneesh V <aneesh@ti.com>
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*/
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MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,
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LENGTH = IMAGE_MAX_SIZE }
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#ifdef CONFIG_SPL_SEPARATE_BSS
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MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR,
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LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
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#endif
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OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
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OUTPUT_ARCH(aarch64)
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ENTRY(_start)
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SECTIONS
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{
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__image_copy_start = ADDR(.text);
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.text : {
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. = ALIGN(8);
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CPUDIR/start.o (.text*)
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*(.text*)
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} >.sram
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.rodata : {
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. = ALIGN(8);
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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} >.sram
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.data : {
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. = ALIGN(8);
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*(.data*)
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} >.sram
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#ifdef CONFIG_SPL_RECOVER_DATA_SECTION
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.data_save : {
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*(.__data_save_start)
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. = SIZEOF(.data);
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*(.__data_save_end)
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} >.sram
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#endif
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__u_boot_list : {
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. = ALIGN(8);
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KEEP(*(SORT(__u_boot_list*)));
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} >.sram
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. = ALIGN(8);
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__image_copy_end = .;
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_end = .;
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_image_binary_end = .;
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#ifdef CONFIG_SPL_SEPARATE_BSS
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.bss : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(8);
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__bss_end = .;
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} >.sdram
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#else
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.bss (NOLOAD) : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(8);
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__bss_end = .;
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} >.sram
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#endif
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__bss_size = __bss_end - __bss_start;
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/DISCARD/ : { *(.rela*) }
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/DISCARD/ : { *(.dynsym) }
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/DISCARD/ : { *(.dynstr*) }
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/DISCARD/ : { *(.dynamic*) }
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/DISCARD/ : { *(.plt*) }
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/DISCARD/ : { *(.interp*) }
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/DISCARD/ : { *(.gnu*) }
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#ifdef CONFIG_LINUX_KERNEL_IMAGE_HEADER
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#include "linux-kernel-image-header-vars.h"
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#endif
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}
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ASSERT(ADDR(.bss) % 8 == 0, \
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".bss must be 8-byte aligned");
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