Ashish kumar 2ea3a448cc armv8: ls2080a: Implement workaround for core errata 829520, 833471 ...

829520: Code bounded by indirect conditional branch might corrupt
instruction stream.
Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect
Predictor.

833471: VMSR FPSCR functional failure or deadlock.
Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

2016-02-01 13:58:22 -08:00

..

fsl-layerscape

armv8/ls1043aqds: add QSPI support in SD boot

2016-01-27 08:28:55 -08:00

hisilicon

…

zynqmp

ARM64: zynqmp: Add initial support for the first silicon

2016-01-27 15:55:56 +01:00

cache_v8.c

armv8: New MMU setup code allowing to use 48+ bits PA/VA

2016-01-19 22:25:36 +00:00

cache.S

arm: armv8 correct value passed to __asm_dcache_all

2015-09-12 09:03:39 +02:00

config.mk

…

cpu.c

…

exceptions.S

…

fwcall.c

armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure

2016-01-19 22:25:36 +00:00

generic_timer.c

armv8: define usec2ticks function

2015-12-15 08:57:34 +08:00

Kconfig

…

Makefile

armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure

2016-01-19 22:25:36 +00:00

start.S

armv8: ls2080a: Implement workaround for core errata 829520, 833471

2016-02-01 13:58:22 -08:00

tlb.S

…

transition.S

…

u-boot-spl.lds

…

u-boot.lds

…