46b3ff8205
Add support for PHYTEC phyCORE-AM64x SoM. Supported features: - 2GB DDR4 RAM - eMMC Flash - external uSD - OSPI NOR Flash - debug UART Product page SoM: https://www.phytec.com/product/phycore-am64x Device trees were taken from Linux v6.8-rc2. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Dhruva Gole <d-gole@ti.com>
51 lines
945 B
C
51 lines
945 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
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* Author: Matt McKee <mmckee@phytec.com>
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*
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* Copyright (C) 2022 - 2024 PHYTEC Messtechnik GmbH
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* Author: Wadim Egorov <w.egorov@phytec.de>
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*/
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#include <asm/io.h>
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#include <env.h>
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#include <env_internal.h>
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#include <spl.h>
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#include <fdt_support.h>
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#include <asm/arch/hardware.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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return fdtdec_setup_mem_size_base();
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}
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int dram_init_banksize(void)
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{
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return fdtdec_setup_memory_banksize();
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}
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#define CTRLMMR_USB0_PHY_CTRL 0x43004008
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#define CORE_VOLTAGE 0x80000000
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#ifdef CONFIG_SPL_BOARD_INIT
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void spl_board_init(void)
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{
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u32 val;
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/* Set USB PHY core voltage to 0.85V */
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val = readl(CTRLMMR_USB0_PHY_CTRL);
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val &= ~(CORE_VOLTAGE);
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writel(val, CTRLMMR_USB0_PHY_CTRL);
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/* Init DRAM size for R5/A53 SPL */
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dram_init_banksize();
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}
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#endif
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