Dinh Nguyen 9ad7147b8d armv8: minor fix to comment for enabling SMPEN bit ...

The SMPEN bit is located in the cpuectlr_el1 register and not the
cpuactlr_el1 register. Adjust the comment accordingly and also fix
a spelling error.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
CC: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
CC: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
CC: York Sun <york.sun@nxp.com>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>

2017-05-15 10:38:04 -04:00

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fsl-layerscape

arm: psci: make psci usable on single core socs

2017-04-24 09:07:12 -07:00

hisilicon

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s32v234

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zynqmp

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cache_v8.c

arm: Support cache invalidate

2017-05-11 22:03:39 -04:00

cache.S

arm: Support cache invalidate

2017-05-11 22:03:39 -04:00

config.mk

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cpu-dt.c

arm: psci: make psci usable on single core socs

2017-04-24 09:07:12 -07:00

cpu.c

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exceptions.S

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fwcall.c

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generic_timer.c

arm: Correct signature for get_ticks()

2017-05-11 22:03:38 -04:00

Kconfig

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lowlevel_init.S

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Makefile

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psci.S

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sec_firmware_asm.S

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sec_firmware.c

arm: psci: make psci usable on single core socs

2017-04-24 09:07:12 -07:00

smccc-call.S

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spin_table_v8.S

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spin_table.c

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start.S

armv8: minor fix to comment for enabling SMPEN bit

2017-05-15 10:38:04 -04:00

tlb.S

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transition.S

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u-boot-spl.lds

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u-boot.lds

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