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u-boot/drivers/clk
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Patrick Delaunay 266fa4df00 clk: stm32mp1: add clock tree initialization 
add binding and code for clock tree initialization from device tree

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
..
aspeed
dm: Rename dev_addr..() functions
2017-06-01 07:03:01 -06:00
at91
clk: at91: clk-system: add set/get_rate operations
2018-03-16 07:30:04 -04:00
exynos
dm: Rename dev_addr..() functions
2017-06-01 07:03:01 -06:00
renesas
clk: renesas: Add R8A77965 M3N entries
2018-03-05 10:59:37 +01:00
rockchip
rockchip: clk: rk1108: convert to use live dt
2018-03-13 18:12:35 +01:00
tegra
clock: implement a driver for the Tegra CAR
2016-09-27 09:11:02 -07:00
uniphier
clk: uniphier: add NAND controller clock
2017-10-15 22:32:25 +09:00
clk_bcm6345.c
dm: Rename dev_addr..() functions
2017-06-01 07:03:01 -06:00
clk_boston.c
treewide: replace with error() with pr_err()
2017-10-04 11:59:44 -04:00
clk_fixed_rate.c
clk: Remove superfluous gd declarations
2018-01-21 10:01:02 -07:00
clk_pic32.c
wait_bit: use wait_for_bit_le32 and remove wait_for_bit
2018-01-24 12:03:43 +05:30
clk_sandbox_test.c
clk: convert API to match reset/mailbox style
2016-06-19 17:05:55 -06:00
clk_sandbox.c
clk: sandbox: don't check clk ID against 0
2016-06-24 17:24:35 -04:00
clk_stm32f.c
clk: clk_stm32f: Add DSI clock support
2018-03-13 21:45:37 -04:00
clk_stm32h7.c
clk: clk_stm32h7: Fix prescaler for Domain 3
2018-03-13 21:45:37 -04:00
clk_stm32mp1.c
clk: stm32mp1: add clock tree initialization
2018-03-19 16:14:22 -04:00
clk_zynq.c
dm: clk: Update uclass to support livetree
2017-06-01 07:03:14 -06:00
clk_zynqmp.c
clk: zynqmp: Remove unused macros/variables
2017-08-02 09:11:52 +02:00
clk-hsdk-cgu.c
ARC: HSDK: CGU: Add 'Hz' when printing clock frequency
2018-01-19 17:59:35 +03:00
clk-uclass.c
clk: implement clk_set_defaults()
2018-01-28 17:12:36 +01:00
Kconfig
clk: add driver for stm32mp1
2018-03-19 16:14:22 -04:00
Makefile
clk: add driver for stm32mp1
2018-03-19 16:14:22 -04:00