d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
102 lines
2.3 KiB
C
102 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2016 Google, Inc
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <pch.h>
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#include <pci.h>
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#include <asm/global_data.h>
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#include <asm/intel_regs.h>
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#include <asm/io.h>
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#include <asm/lpc_common.h>
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#include <linux/bitops.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Enable Prefetching and Caching */
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static void enable_spi_prefetch(struct udevice *pch)
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{
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u8 reg8;
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dm_pci_read_config8(pch, 0xdc, ®8);
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reg8 &= ~(3 << 2);
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reg8 |= (2 << 2); /* Prefetching and Caching Enabled */
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dm_pci_write_config8(pch, 0xdc, reg8);
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}
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static void enable_port80_on_lpc(struct udevice *pch)
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{
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/* Enable port 80 POST on LPC */
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dm_pci_write_config32(pch, PCH_RCBA_BASE, RCB_BASE_ADDRESS | 1);
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clrbits_le32(RCB_REG(GCS), 4);
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}
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/**
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* lpc_early_init() - set up LPC serial ports and other early things
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*
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* @dev: LPC device
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* Return: 0 if OK, -ve on error
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*/
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int lpc_common_early_init(struct udevice *dev)
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{
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struct udevice *pch = dev->parent;
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struct reg_info {
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u32 base;
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u32 size;
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} values[4], *ptr;
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int count;
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int i;
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count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
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"intel,gen-dec", (u32 *)values,
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sizeof(values) / (sizeof(u32)));
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if (count < 0)
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return -EINVAL;
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/* Set COM1/COM2 decode range */
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dm_pci_write_config16(pch, LPC_IO_DEC, 0x0010);
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/* Enable PS/2 Keyboard/Mouse, EC areas and COM1 */
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dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | MC_LPC_EN |
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GAMEL_LPC_EN | COMA_LPC_EN);
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/* Write all registers but use 0 if we run out of data */
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count = count * sizeof(u32) / sizeof(values[0]);
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for (i = 0, ptr = values; i < ARRAY_SIZE(values); i++, ptr++) {
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u32 reg = 0;
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if (i < count)
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reg = ptr->base | PCI_COMMAND_IO | (ptr->size << 16);
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dm_pci_write_config32(pch, LPC_GENX_DEC(i), reg);
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}
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enable_spi_prefetch(pch);
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/* This is already done in start.S, but let's do it in C */
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enable_port80_on_lpc(pch);
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return 0;
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}
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int lpc_set_spi_protect(struct udevice *dev, int bios_ctrl, bool protect)
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{
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uint8_t bios_cntl;
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/* Adjust the BIOS write protect and SMM BIOS Write Protect Disable */
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dm_pci_read_config8(dev, bios_ctrl, &bios_cntl);
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if (protect) {
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bios_cntl &= ~BIOS_CTRL_BIOSWE;
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bios_cntl |= BIT(5);
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} else {
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bios_cntl |= BIOS_CTRL_BIOSWE;
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bios_cntl &= ~BIT(5);
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}
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dm_pci_write_config8(dev, bios_ctrl, bios_cntl);
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return 0;
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}
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