Shengzhou Liu d8e5163ad8 drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl ...

The clk_adjust is of SDRAM_CLK_CNTL[5:8] 4-bits on MPC85xx and P-series,
but is of SDRAM_CLK_CNTL[5:9] 5-bits on T-series and LS-series SoCs.
We should update it to adapt the case that clk_adjust is odd data.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

2016-06-03 14:06:35 -07:00

..

arm_ddr_gen3.c

driver/ddr/fsl: Add support for multiple DDR clocks

2015-02-24 13:09:18 -08:00

ctrl_regs.c

drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl

2016-06-03 14:06:35 -07:00

ddr1_dimm_params.c

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2016-01-19 08:31:21 -05:00

ddr2_dimm_params.c

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2016-01-19 08:31:21 -05:00

ddr3_dimm_params.c

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2016-01-19 08:31:21 -05:00

ddr4_dimm_params.c

driver/ddr/fsl: Fix driver to support empty first slot

2015-04-23 08:55:53 -07:00

fsl_ddr_gen4.c

driver/ddr/fsl: Add workaround for erratum A-010165

2016-05-18 08:51:47 -07:00

interactive.c

driver/ddr/fsl: Fix driver to support empty first slot

2015-04-23 08:55:53 -07:00

lc_common_dimm_params.c

Fix typo choosen in comments and printf logs

2016-03-27 09:12:23 -04:00

main.c

drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers

2016-01-25 08:24:16 -08:00

Makefile

Various Makefiles: Add SPDX-License-Identifier tags

2015-11-10 09:19:52 -05:00

mpc85xx_ddr_gen1.c

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2016-01-19 08:31:21 -05:00

mpc85xx_ddr_gen2.c

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2016-01-19 08:31:21 -05:00

mpc85xx_ddr_gen3.c

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2016-01-19 08:31:21 -05:00

mpc86xx_ddr.c

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2016-01-19 08:31:21 -05:00

options.c

driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete

2016-03-21 12:42:13 -07:00

util.c

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2016-01-19 08:31:21 -05:00