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app: stacked_cores: 41-xx: complete start of 800um 16x 5:1 5e9 I sim, and remove it

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too low transfer at logic low.

also, add a tool to analyze inverters without plotting them
This commit is contained in:
colin
2022-10-04 15:52:13 -07:00
parent c8bf2053ef
commit 6d8e9d050f
4 changed files with 27 additions and 2 deletions
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10
crates/applications/stacked_cores/scripts/analyze_inverters.py Executable file
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@@ -0,0 +1,10 @@
#!/usr/bin/env python3
from stacked_cores_40xx_db import *
sims = [(p, c.logically_inverted()) for (p, c) in filter_meas(run="41")]
sims.sort(key=lambda c: c[1].get(1.0))
for (params, curve) in sims[:20]:
viable = curve.is_viable_inverter()
print(f"{params}: {curve.get(1.0):.3}, {curve.get(0.0):.3}, inv?: {viable}")

3
crates/applications/stacked_cores/scripts/plot_inverters.py
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@@ -95,7 +95,8 @@ of_interest += [(p, get_meas(p)) for p in
# SimParams41(6, 2, 400, "1e10"), # SimParams41(6, 2, 400, "1e10"),
# SimParams41(9, 3, 600, "2e10"), # SimParams41(9, 3, 600, "2e10"),
# SimParams41(10, 3, 800, "1e10"), # SimParams41(10, 3, 800, "1e10"),
# SimParams41(24, 1, 800, "5e9"), SimParams41(24, 1, 800, "5e9"),
SimParams41(24, 1, 800, "3e9"),
SimParams41(16, 2, 800, "1e10"), SimParams41(16, 2, 800, "1e10"),
SimParams41(16, 2, 800, "5e9"), SimParams41(16, 2, 800, "5e9"),
# SimParams41(9, 1, 400, "5e9"), # SimParams41(9, 1, 400, "5e9"),

13
crates/applications/stacked_cores/scripts/stacked_cores_40xx_db.py
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@@ -15,6 +15,9 @@ class SimParams:
def __eq__(self, other: 'SimParams') -> bool: def __eq__(self, other: 'SimParams') -> bool:
return self.tuple == other.tuple return self.tuple == other.tuple
def __repr__(self) -> str:
return f"SimParams({self.human_name})"
@property @property
def run(self) -> str: def run(self) -> str:
raise NotImplementedError raise NotImplementedError
@@ -141,6 +144,7 @@ sims = [
(SimParams41(10, 3, 800, "1e10"), None, 20000), (SimParams41(10, 3, 800, "1e10"), None, 20000),
(SimParams41(9, 1, 400, "5e9"), None, 20000), (SimParams41(9, 1, 400, "5e9"), None, 20000),
(SimParams41(24, 1, 800, "5e9"), None, 20000), (SimParams41(24, 1, 800, "5e9"), None, 20000),
(SimParams41(24, 1, 800, "3e9"), None, 20000),
(SimParams41(16, 2, 800, "1e10"), None, 20000), (SimParams41(16, 2, 800, "1e10"), None, 20000),
(SimParams41(16, 2, 800, "5e9"), None, 20000), (SimParams41(16, 2, 800, "5e9"), None, 20000),
] ]
@@ -1870,4 +1874,13 @@ Piecewise(
) )
""") """)
set_meas("41-0.0008rad-16coupling-5_1_winding-5e9-drive", """
Piecewise(
[
[ -17134, -9658 ], # -1.0
[ 17450, 1684 ], # 1.0
]
)
""")
if __name__ == '__main__': main() if __name__ == '__main__': main()

3
crates/applications/stacked_cores/src/main.rs
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@@ -4065,7 +4065,7 @@ fn main() {
] { ] {
for (coupling_loops, s0_loops, s_major, cur_flt) in [ for (coupling_loops, s0_loops, s_major, cur_flt) in [
// waiting for completion // waiting for completion
(16, 2, um(800), 5e9), // unstarted (24, 1, um(800), 3e9), // unstarted
// VIABLE INVERTERS // VIABLE INVERTERS
(24, 1, um(800), 5e9), // VIABLE INVERTER (0.54, 0.90) (24, 1, um(800), 5e9), // VIABLE INVERTER (0.54, 0.90)
@@ -4080,6 +4080,7 @@ fn main() {
(10, 3, um(800), 2e10), // VIABLE INVERTER (0.76, 0.83); verified geom (10, 3, um(800), 2e10), // VIABLE INVERTER (0.76, 0.83); verified geom
// (16, 2, um(800), 5e9), // incomplete; too low tx @ 0
// (10, 3, um(800), 1e10), // verified geom; too low slope // (10, 3, um(800), 1e10), // verified geom; too low slope
// (18, 1, um(600), 2e10), // too late tx. // (18, 1, um(600), 2e10), // too late tx.
// (16, 2, um(800), 2e10), // too late tx. very low margin inverter (0.81, 0.82) // (16, 2, um(800), 2e10), // too late tx. very low margin inverter (0.81, 0.82)