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app: stacked_cores: mix Outside coupling with Direct multi-coupling

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colin
2022-09-09 01:53:16 -07:00
parent 1a242f05c1
commit d42eb32e07
1 changed files with 211 additions and 7 deletions
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208
crates/applications/stacked_cores/src/main.rs
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@@ -515,6 +515,7 @@ fn drive_map_nstack_one_sided_inv<const N: usize>() -> [[ClockState; N]; 6] {
clocks
}
/// this is intended for S0 to *directly* couple S1, S2, S3, ...
#[allow(unused)]
fn drive_map_nstack_one_sided<const N: usize>() -> [[ClockState; N]; 6] {
use ClockState as C;
@@ -539,6 +540,83 @@ fn drive_map_nstack_one_sided<const N: usize>() -> [[ClockState; N]; 6] {
clocks
}
#[allow(unused)]
fn drive_map_nstack_one_sided_with_output<const N: usize>() -> [[ClockState; N]; 6] {
use ClockState as C;
let mut clocks = drive_map_nstack_one_sided::<N>();
// the final core is coupled to S1, S2, ...
// it needs to be initialized to the opposite polarity as those cores
clocks[0][N-1] = C::hold_high();
clocks[1][N-1] = C::release_high();
clocks[2][N-1] = C::float();
clocks[3][N-1] = C::hold_high();
clocks[4][N-1] = C::release_high();
clocks[5][N-1] = C::float();
clocks
}
/// S0 couples to S1, S2, S3, ... in parallel.
/// S1, S2, S3, ... is coupled to Sn with one loop.
/// we write S0 -> S1, S2, ... while holding Sn static.
/// then we write S1, S2, ... to Sn while holding S0 static
#[allow(unused)]
fn drive_map_nstack_one_sided_with_output_locked<const N: usize>() -> [[ClockState; N]; 10] {
use ClockState as C;
let mut clocks = [[C::float(); N]; 10];
for c in 0..N {
clocks[0][c] = match c { // charge to base state (for active transfer)
0 => C::hold_high(),
x if x == N-1 => C::hold_low(),
_ => C::hold_low(),
};
clocks[1][c] = match c { // let main cores settle
0 => C::release_high(),
x if x == N-1 => C::hold_low(),
_ => C::release_low(),
};
clocks[2][c] = match c { // write S0 -> S1, S2, ...
0 => C::hold_low(),
x if x == N-1 => C::hold_low(),
_ => C::float(),
};
clocks[3][c] = match c { // open Sn-1 for write
0 => C::hold_low(),
x if x == N-1 => C::release_low(),
_ => C::float(),
};
clocks[4][c] = match c { // write S1, S2, ... -> Sn-1
x if x == N-1 => C::float(),
_ => C::hold_low(),
};
clocks[5][c] = match c { // reset cores for noop transfer
x if x == N-1 => C::hold_low(),
_ => C::hold_low(),
};
clocks[6][c] = match c { // let main cores settle
x if x == N-1 => C::hold_low(),
_ => C::release_low(),
};
clocks[7][c] = match c { // write S0 -> S1, S2, ...
0 => C::hold_low(),
x if x == N-1 => C::hold_low(),
_ => C::float(),
};
clocks[8][c] = match c { // open Sn-1 for write
0 => C::hold_low(),
x if x == N-1 => C::release_low(),
_ => C::float(),
};
clocks[9][c] = match c { // write S1, S2, ... -> Sn-1
x if x == N-1 => C::float(),
_ => C::hold_low(),
};
}
clocks
}
fn main() {
coremem::init_logging();
// coremem::init_debug();
@@ -1273,7 +1351,7 @@ fn main() {
p12xx.with_input_magnitude(5e11),
);
}
if true {
if false {
let p13xx = params
.with_clock_phase_duration(ps(1000))
.with_clock_decay(ps(50))
@@ -1312,6 +1390,28 @@ fn main() {
.with_coupling(0, 3, 2, 4, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 4, CouplingMethod::Outside)
);
run_sim(
"13-5stack-8loop-5e10-drive",
drive_map_nstack_one_sided::<5>(),
p13xx
.with_input_magnitude(5e10)
.with_coupling_loops(8)
.with_coupling(0, 1, 0, 4, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 4, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 4, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 4, CouplingMethod::Outside)
);
run_sim(
"13-5stack-8loop-2e10-drive",
drive_map_nstack_one_sided::<5>(),
p13xx
.with_input_magnitude(2e10)
.with_coupling_loops(8)
.with_coupling(0, 1, 0, 4, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 4, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 4, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 4, CouplingMethod::Outside)
);
run_sim(
"13-5stack-6loop-8e10-drive",
drive_map_nstack_one_sided::<5>(),
@@ -1347,6 +1447,30 @@ fn main() {
.with_coupling(0, 4, 3, 5, CouplingMethod::Outside)
.with_coupling(0, 5, 4, 5, CouplingMethod::Outside)
);
run_sim(
"13-6stack-6loop-5e10-drive",
drive_map_nstack_one_sided::<6>(),
p13xx
.with_input_magnitude(5e10)
.with_coupling_loops(6)
.with_coupling(0, 1, 0, 5, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 5, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 5, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 5, CouplingMethod::Outside)
.with_coupling(0, 5, 4, 5, CouplingMethod::Outside)
);
run_sim(
"13-6stack-6loop-2e10-drive",
drive_map_nstack_one_sided::<6>(),
p13xx
.with_input_magnitude(2e10)
.with_coupling_loops(6)
.with_coupling(0, 1, 0, 5, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 5, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 5, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 5, CouplingMethod::Outside)
.with_coupling(0, 5, 4, 5, CouplingMethod::Outside)
);
run_sim(
"13-7stack-5loop-8e10-drive",
drive_map_nstack_one_sided::<7>(),
@@ -1374,6 +1498,86 @@ fn main() {
.with_coupling(0, 6, 5, 7, CouplingMethod::Outside)
.with_coupling(0, 7, 6, 7, CouplingMethod::Outside)
);
run_sim(
"13-8stack-5loop-5e10-drive",
drive_map_nstack_one_sided::<8>(),
p13xx
.with_input_magnitude(5e10)
.with_coupling_loops(5)
.with_coupling(0, 1, 0, 7, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 7, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 7, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 7, CouplingMethod::Outside)
.with_coupling(0, 5, 4, 7, CouplingMethod::Outside)
.with_coupling(0, 6, 5, 7, CouplingMethod::Outside)
.with_coupling(0, 7, 6, 7, CouplingMethod::Outside)
);
}
if false {
let p14xx = params
.with_clock_phase_duration(ps(1000))
.with_clock_decay(ps(50))
.with_input_magnitude(8e10)
.with_ctl_conductivity(5e2)
.with_coupling_conductivity(5e3)
.with_s_major(um(400))
;
run_sim(
"14-6stack-6loop-8e10-drive",
drive_map_nstack_one_sided_with_output::<6>(),
p14xx
.with_input_magnitude(8e10)
.with_coupling_loops(6)
.with_coupling(0, 1, 0, 5, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 5, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 5, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 5, CouplingMethod::Outside)
.with_coupling(1, 5, 4, 5, CouplingMethod::Direct)
);
run_sim(
"14-5stack-8loop-8e10-drive",
drive_map_nstack_one_sided_with_output::<5>(),
p14xx
.with_input_magnitude(8e10)
.with_coupling_loops(8)
.with_coupling(0, 1, 0, 4, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 4, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 4, CouplingMethod::Outside)
.with_coupling(1, 4, 3, 4, CouplingMethod::Direct)
);
}
if true {
let p16xx = params
.with_clock_phase_duration(ps(1000))
.with_clock_decay(ps(50))
.with_input_magnitude(8e10)
.with_ctl_conductivity(5e2)
.with_coupling_conductivity(5e3)
.with_s_major(um(400))
;
run_sim(
"16-6stack-6loop-8e10-drive",
drive_map_nstack_one_sided_with_output_locked::<6>(),
p16xx
.with_input_magnitude(8e10)
.with_coupling_loops(6)
.with_coupling(0, 1, 0, 5, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 5, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 5, CouplingMethod::Outside)
.with_coupling(0, 4, 3, 5, CouplingMethod::Outside)
.with_coupling(1, 5, 4, 5, CouplingMethod::Direct)
);
run_sim(
"16-5stack-8loop-8e10-drive",
drive_map_nstack_one_sided_with_output_locked::<5>(),
p16xx
.with_input_magnitude(8e10)
.with_coupling_loops(8)
.with_coupling(0, 1, 0, 4, CouplingMethod::Outside)
.with_coupling(0, 2, 1, 4, CouplingMethod::Outside)
.with_coupling(0, 3, 2, 4, CouplingMethod::Outside)
.with_coupling(1, 4, 3, 4, CouplingMethod::Direct)
);
}
}
@@ -1430,6 +1634,7 @@ fn run_sim<const C: usize, const R: usize>(
for core in 0..num_cores {
driver.fill_region(&params.s(core), ferro_mat);
driver.fill_region(&params.ctl(core), ctl_mat);
}
for &(from, to, id, of, meth) in &params.couplings {
for loop_ in 0..params.coupling_loops {
match meth {
@@ -1438,7 +1643,6 @@ fn run_sim<const C: usize, const R: usize>(
}
}
}
}
//////// monitor some measurements
for core in 0..num_cores {