Clock the ADC so that its startup sequence doesn't hang :-)

Have yet to attempt to read it though
This commit is contained in:
Colin 2019-09-28 14:19:23 -07:00
parent f3075706d7
commit b9ff4e8bb4
2 changed files with 17 additions and 2 deletions

View File

@ -3,7 +3,7 @@
pub use f3::hal::stm32f30x::{adc1, gpioa, gpioc, rcc};
use f3::hal::stm32f30x::{self, ADC1, GPIOA, GPIOD, GPIOE, RCC};
use f3::hal::stm32f30x::{self, ADC1, ADC1_2, GPIOA, GPIOD, GPIOE, RCC};
pub struct Peripherals {
pub gpioa: GPIOA,
@ -11,6 +11,7 @@ pub struct Peripherals {
pub gpioe: GPIOE,
pub rcc: RCC,
pub adc1: ADC1,
pub adc1_2: ADC1_2
}
pub fn init() -> Peripherals {
@ -23,5 +24,6 @@ pub fn init() -> Peripherals {
gpioe: per.GPIOE,
rcc: per.RCC,
adc1: per.ADC1,
adc1_2: per.ADC1_2,
}
}

View File

@ -131,6 +131,13 @@ fn main() -> ! {
w.adc12en().enabled()
});
// Clock ADC1/2 from HCLK.
// NB: I don't understand why this is necessary; the RCC should already be generating a clock
// as per above?
per.adc1_2.ccr.modify(|_, w| {
unsafe {w.ckmode().bits(0b11) }
});
// All LEDS are outputs
per.gpioe.moder.modify(|_, w| {
w.moder8().output();
@ -178,11 +185,12 @@ fn main() -> ! {
// (T ADCVREG_STUP ) before launching a calibration or enabling the ADC."
// 10 uS worst-case
delay(1000); // >= 10 us
bkpt();
per.adc1.cr.modify(|_, w| {
w.advregen().set_bit()
});
delay(1000); // >= 10 us
// ADC CALIBRATION (15.3.8)
// 1. set ADCALDIF=0 (default)
@ -190,6 +198,11 @@ fn main() -> ! {
per.adc1.cr.modify(|_, w| {
w.adcal().set_bit()
});
delay(1000); // >= 10 us
//panic!("adc1.isr: {:x}\n adc1.cr: {:x}",
// per.adc1.isr.read().bits(),
// per.adc1.cr.read().bits());
// Wait for done
while per.adc1.cr.read().adcal().bit() { }