colin/u-boot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

clk: rzg2l: Ignore disable for core clocks

Browse Source 
Following on from commit 9a699a0a0d ("clk: rzg2l: Ignore enable for
core clocks"), we also need to ignore attempts to disable core clocks to
avoid the need for conditionals around clk_disable_bulk() calls in
drivers which support both RZ/G2L and other Renesas SoCs.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
Paul Barker
2025-03-04 19:44:35 +00:00
committed by Marek Vasut
parent 33ccfae853
commit 0648671dd3
1 changed files with 6 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/clk/renesas/rzg2l-cpg.c
View File

@@ -70,17 +70,12 @@ static int rzg2l_cpg_clk_set(struct clk *clk, bool enable)
dev_dbg(clk->dev, "%s %s clock %u\n", enable ? "enable" : "disable",
is_mod_clk(clk->id) ? "module" : "core", cpg_clk_id);
if (!is_mod_clk(clk->id)) {
/*
* Non-module clocks are always on. Ignore attempts to enable
* them and reject attempts to disable them.
*/
if (enable)
return 0;
dev_err(clk->dev, "ID %lu is not a module clock\n", clk->id);
return -EINVAL;
}
/*
* Non-module clocks are always on. Ignore attempts to enable or disable
* them.
*/
if (!is_mod_clk(clk->id))
return 0;
for (i = 0; i < data->info->num_mod_clks; i++) {
if (data->info->mod_clks[i].id == cpg_clk_id) {