net: phy: Add driver for Motorcomm YT8531S Gigabit ethernet phy
Add driver for Motorcomm YT8531S Gigabit ethernet phy. Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
This commit is contained in:
@@ -1,8 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Motorcomm 8531 PHY driver.
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* Motorcomm YT8511/YT8531/YT8531S/YT8821 PHY driver.
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*
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* Copyright (C) 2023 StarFive Technology Co., Ltd.
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* Copyright (C) 2024 Motorcomm Electronic Technology Co., Ltd.
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*/
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#include <config.h>
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@@ -13,6 +14,7 @@
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#define PHY_ID_YT8511 0x0000010a
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#define PHY_ID_YT8531 0x4f51e91b
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#define PHY_ID_YT8821 0x4f51ea19
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#define PHY_ID_YT8531S 0x4f51e91a
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#define PHY_ID_MASK GENMASK(31, 0)
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/* Extended Register's Address Offset Register */
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@@ -1114,6 +1116,86 @@ static int yt8821_startup(struct phy_device *phydev)
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return 0;
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}
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static int yt8531s_config(struct phy_device *phydev)
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{
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struct ytphy_plat_priv *priv = phydev->priv;
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u16 mask, val;
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int ret;
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ret = genphy_config_aneg(phydev);
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if (ret < 0)
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return ret;
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ytphy_dt_parse(phydev);
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switch (priv->clk_out_frequency) {
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case YTPHY_DTS_OUTPUT_CLK_DIS:
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mask = YT8531_SCR_SYNCE_ENABLE;
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val = 0;
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break;
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case YTPHY_DTS_OUTPUT_CLK_25M:
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mask = YT8531_SCR_SYNCE_ENABLE | YT8531_SCR_CLK_SRC_MASK |
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YT8531_SCR_CLK_FRE_SEL_125M;
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val = YT8531_SCR_SYNCE_ENABLE |
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FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,
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YT8531_SCR_CLK_SRC_REF_25M);
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break;
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case YTPHY_DTS_OUTPUT_CLK_125M:
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mask = YT8531_SCR_SYNCE_ENABLE | YT8531_SCR_CLK_SRC_MASK |
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YT8531_SCR_CLK_FRE_SEL_125M;
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val = YT8531_SCR_SYNCE_ENABLE | YT8531_SCR_CLK_FRE_SEL_125M |
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FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,
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YT8531_SCR_CLK_SRC_PLL_125M);
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break;
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default:
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pr_warn("Freq err:%u\n", priv->clk_out_frequency);
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return -EINVAL;
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}
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ret = ytphy_modify_ext(phydev, YTPHY_SYNCE_CFG_REG, mask,
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val);
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if (ret < 0)
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return ret;
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ret = ytphy_rgmii_clk_delay_config(phydev);
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if (ret < 0)
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return ret;
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if (priv->flag & AUTO_SLEEP_DISABLED) {
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/* disable auto sleep */
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ret = ytphy_modify_ext(phydev,
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YT8531_EXTREG_SLEEP_CONTROL1_REG,
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YT8531_ESC1R_SLEEP_SW, 0);
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if (ret < 0)
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return ret;
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}
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if (priv->flag & KEEP_PLL_ENABLED) {
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/* enable RXC clock when no wire plug */
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ret = ytphy_modify_ext(phydev,
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YT8531_CLOCK_GATING_REG,
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YT8531_CGR_RX_CLK_EN, 0);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int yt8531s_startup(struct phy_device *phydev)
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{
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int ret;
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ret = genphy_update_link(phydev);
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if (ret)
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return ret;
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ret = yt8531_parse_status(phydev);
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if (ret)
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return ret;
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return 0;
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}
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U_BOOT_PHY_DRIVER(motorcomm8511) = {
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.name = "YT8511 Gigabit Ethernet",
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.uid = PHY_ID_YT8511,
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@@ -1145,3 +1227,14 @@ U_BOOT_PHY_DRIVER(motorcomm8821) = {
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.startup = &yt8821_startup,
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.shutdown = &genphy_shutdown,
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};
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U_BOOT_PHY_DRIVER(motorcomm8531S) = {
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.name = "YT8531S Gigabit Ethernet Transceiver",
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.uid = PHY_ID_YT8531S,
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.mask = PHY_ID_MASK,
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.features = PHY_GBIT_FEATURES,
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.probe = &yt8531_probe,
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.config = &yt8531s_config,
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.startup = &yt8531s_startup,
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.shutdown = &genphy_shutdown,
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};
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