mtd: spi-nor: Use CONFIG_IS_ENABLED for CONFIG_SPI_FLASH_BAR defines
At the moment a mixture of ifdef(CONFIG_IS_ENABLED) and
CONFIG_IS_ENABLED(SPI_FLASH_BAR) is used in the spi-nor framework.
This leads to misbehaviour in the SPL as there is no Kconfig option
CONFIG_SPL_SPI_FLASH_BAR. This commit standardizes the use of
CONFIG_SPI_FLASH to get SPLs that load U-Boot proper from the
SPI flash to work again.
Fixes: 9bb02f7
(mtd: spi-nor: Fix the spi_nor_read() when config SPI_STACKED_PARALLEL is enabled)
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
This commit is contained in:

committed by
Tom Rini

parent
299371dc8e
commit
37ccf4a949
@@ -655,7 +655,7 @@ static struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
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return mtd->priv;
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}
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#ifndef CONFIG_SPI_FLASH_BAR
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#if !CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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static u8 spi_nor_convert_opcode(u8 opcode, const u8 table[][2], size_t size)
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{
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size_t i;
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@@ -739,7 +739,7 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
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nor->program_opcode = spi_nor_convert_3to4_program(nor->program_opcode);
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nor->erase_opcode = spi_nor_convert_3to4_erase(nor->erase_opcode);
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}
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#endif /* !CONFIG_SPI_FLASH_BAR */
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#endif /* !CONFIG_IS_ENABLED(SPI_FLASH_BAR) */
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/* Enable/disable 4-byte addressing mode. */
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static int set_4byte(struct spi_nor *nor, const struct flash_info *info,
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@@ -930,7 +930,7 @@ static int spi_nor_erase_chip_wait_till_ready(struct spi_nor *nor, unsigned long
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return spi_nor_wait_till_ready_with_timeout(nor, timeout);
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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/*
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* This "clean_bar" is necessary in a situation when one was accessing
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* spi flash memory > 16 MiB by using Bank Address Register's BA24 bit.
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@@ -1141,7 +1141,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
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nor->spi->flags &= ~SPI_XFER_U_PAGE;
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}
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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ret = write_bar(nor, offset);
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if (ret < 0)
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goto erase_err;
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@@ -1175,7 +1175,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
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addr_known = false;
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erase_err:
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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err = clean_bar(nor);
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if (!ret)
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ret = err;
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@@ -1630,7 +1630,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
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offset /= 2;
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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ret = write_bar(nor, offset);
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if (ret < 0)
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return log_ret(ret);
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@@ -1667,7 +1667,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
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ret = 0;
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read_err:
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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ret = clean_bar(nor);
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#endif
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return ret;
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@@ -2016,7 +2016,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
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}
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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ret = write_bar(nor, offset);
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if (ret < 0)
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return ret;
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@@ -2090,7 +2090,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
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}
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write_err:
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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ret = clean_bar(nor);
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#endif
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return ret;
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@@ -3791,7 +3791,7 @@ static int s25_s28_setup(struct spi_nor *nor, const struct flash_info *info,
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int ret;
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u8 cr;
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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return -ENOTSUPP; /* Bank Address Register is not supported */
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#endif
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/*
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@@ -4577,7 +4577,7 @@ int spi_nor_scan(struct spi_nor *nor)
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if (nor->flags & (SNOR_F_HAS_PARALLEL | SNOR_F_HAS_STACKED))
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shift = 1;
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if (nor->addr_width == 3 && (mtd->size >> shift) > SZ_16M) {
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#ifndef CONFIG_SPI_FLASH_BAR
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#if !CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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/* enable 4-byte addressing if the device exceeds 16MiB */
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nor->addr_width = 4;
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if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
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@@ -569,7 +569,7 @@ struct spi_nor {
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u8 rdsr_dummy;
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u8 rdsr_addr_nbytes;
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u8 addr_mode_nbytes;
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#ifdef CONFIG_SPI_FLASH_BAR
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#if CONFIG_IS_ENABLED(SPI_FLASH_BAR)
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u8 bank_read_cmd;
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u8 bank_write_cmd;
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u8 bank_curr;
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