usb: dwc3: invalidate dcache on buffer used in interrupt handling
On Qualcomm systems, the setup buffer and even buffers are in a bad state at interrupt handling, so invalidate the dcache lines for the setup_buf and event buffer to make sure we read correct data written by the hardware. This fixes the following error: dwc3-generic-peripheral usb@a600000: UNKNOWN IRQ type -1 dwc3-generic-peripheral usb@a600000: UNKNOWN IRQ type 4673109 and invalid situation in dwc3_gadget_giveback() because setup_buf content is read at 0s and leads to fatal crash fixed by [1]. [1] https://lore.kernel.org/all/20240528-topic-sm8x50-dwc3-gadget-crash-fix-v1-1-58434ab4b3d3@linaro.org/ Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20241011-u-boot-dwc3-gadget-dcache-fixup-v4-3-5f3498d8035b@linaro.org Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
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committed by
Mattijs Korpershoek

parent
502a50ab1f
commit
3e47302dd7
@@ -742,6 +742,8 @@ static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
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if (!dwc->gadget_driver)
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goto out;
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dwc3_invalidate_cache((uintptr_t)ctrl, sizeof(*ctrl));
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len = le16_to_cpu(ctrl->wLength);
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if (!len) {
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dwc->three_stage_setup = false;
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@@ -2534,6 +2534,8 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)
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while (left > 0) {
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union dwc3_event event;
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dwc3_invalidate_cache((uintptr_t)evt->buf, evt->length);
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event.raw = *(u32 *) (evt->buf + evt->lpos);
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dwc3_process_event_entry(dwc, &event);
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@@ -55,4 +55,12 @@ static inline void dwc3_flush_cache(uintptr_t addr, int length)
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flush_dcache_range((unsigned long)start_addr, (unsigned long)end_addr);
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}
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static inline void dwc3_invalidate_cache(uintptr_t addr, int length)
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{
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uintptr_t start_addr = (uintptr_t)addr & ~(CACHELINE_SIZE - 1);
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uintptr_t end_addr = ALIGN((uintptr_t)addr + length, CACHELINE_SIZE);
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invalidate_dcache_range((unsigned long)start_addr, (unsigned long)end_addr);
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}
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#endif /* __DRIVERS_USB_DWC3_IO_H */
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