airoha: Add initial support for Airoha AN7581 SoC

Add initial support for Airoha AN7581 SoC. This adds the initial Kconfig
and Makefile entry for the SoC, an U-Boot specific DTSI and initial config
for it. Also add the initial code for CPU and RAM initialization.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi
2025-03-14 19:59:21 +01:00
committed by Tom Rini
parent fb553201b6
commit 793e327e2c
14 changed files with 267 additions and 0 deletions

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@@ -600,6 +600,13 @@ choice
prompt "Target select"
default TARGET_HIKEY
config ARCH_AIROHA
bool "Airoha SoCs"
select DM
select OF_CONTROL
help
Support for the Airoha soc.
config ARCH_AT91
bool "Atmel AT91"
select GPIO_EXTRA_HEADER
@@ -2251,6 +2258,8 @@ config SYS_KWD_CONFIG
Path within the source directory to the kwbimage.cfg file to use
when packaging the U-Boot image for use.
source "arch/arm/mach-airoha/Kconfig"
source "arch/arm/mach-apple/Kconfig"
source "arch/arm/mach-aspeed/Kconfig"

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@@ -51,6 +51,7 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_AIROHA) += airoha
machine-$(CONFIG_ARCH_APPLE) += apple
machine-$(CONFIG_ARCH_ASPEED) += aspeed
machine-$(CONFIG_ARCH_AT91) += at91

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@@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0+
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
atf-reserved-memory@80000000 {
no-map;
reg = <0x0 0x80000000 0x0 0x40000>;
};
};
};
&uart1 {
bootph-all;
};

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@@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+
/ {
/* When running as a first-stage bootloader this isn't filled in automatically */
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x20000000>;
};
};
#include "an7581-u-boot.dtsi"

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@@ -0,0 +1,32 @@
if ARCH_AIROHA
config SYS_VENDOR
default "airoha"
choice
prompt "Airoha board select"
config TARGET_AN7581
bool "Airoha AN7581 SoC"
select ARM64
help
The Airoha EN7581 is a ARM-based SoC with a quad-core Cortex-A7
including NEON and GPU, Mali-450 graphics, several DDR3 options,
crypto engine, built-in Wi-Fi / Bluetooth combo chip, JPEG decoder,
video interfaces supporting HDMI and MIPI, and video codec support.
Peripherals include Gigabit Ethernet, switch, USB3.0 and OTG, PCIe,
I2S, PCM, S/PDIF, UART, SPI, I2C, IR TX/RX, and PWM.
endchoice
config SYS_SOC
default "an7581" if TARGET_AN7581
config SYS_BOARD
default "an7581" if TARGET_AN7581
config SYS_CONFIG_NAME
default "an7581" if TARGET_AN7581
endif

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@@ -0,0 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
obj-y += cpu.o
obj-$(CONFIG_TARGET_AN7581) += an7581/

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@@ -0,0 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
obj-y += init.o

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@@ -0,0 +1,47 @@
// SPDX-License-Identifier: GPL-2.0
#include <fdtdec.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/system.h>
int print_cpuinfo(void)
{
printf("CPU: Airoha AN7581\n");
return 0;
}
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
void reset_cpu(ulong addr)
{
psci_system_reset();
}
static struct mm_region an7581_mem_map[] = {
{
/* DDR */
.virt = 0x80000000UL,
.phys = 0x80000000UL,
.size = 0x80000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
}, {
.virt = 0x00000000UL,
.phys = 0x00000000UL,
.size = 0x20000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
0,
}
};
struct mm_region *mem_map = an7581_mem_map;

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@@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0
#include <cpu_func.h>
#include <dm.h>
#include <init.h>
#include <wdt.h>
#include <dm/uclass-internal.h>
int arch_cpu_init(void)
{
icache_enable();
return 0;
}
void enable_caches(void)
{
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
}

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@@ -0,0 +1,5 @@
AN7581
M: Christian Marangi <ansuelsmth@gmail.com>
S: Maintained
N: airoha
N: an7581

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@@ -0,0 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
obj-y += an7581_rfb.o

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@@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Author: Christian Marangi <ansuelsmth@gmail.com>
*/
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
return 0;
}

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@@ -0,0 +1,78 @@
CONFIG_ARM=y
CONFIG_ARCH_AIROHA=y
CONFIG_TEXT_BASE=0x81E00000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x7c000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="airoha/en7581-evb"
CONFIG_DM_RESET=y
CONFIG_SYS_LOAD_ADDR=0x81800000
CONFIG_BUILD_TARGET="u-boot.bin"
# CONFIG_EFI_LOADER is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="en7581-evb"
CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_MAXARGS=8
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_BIND=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_LOG=y
CONFIG_OF_UPSTREAM=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_DMA=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHYLIB=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_RAM=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SHA512=y

19
include/configs/an7581.h Normal file
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@@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Configuration for Airoha AN7581
*/
#ifndef __AN7581_H
#define __AN7581_H
#include <linux/sizes.h>
#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
#define CFG_SYS_INIT_RAM_ADDR CONFIG_TEXT_BASE
#define CFG_SYS_INIT_RAM_SIZE SZ_2M
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x80000000
#endif