board: kobol: helios4: enable ddr odt0 on write for both chip-select

Enabling ODT is required to suppress reflection of the data signal on
DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even
when both chip-select are used.

Enable ODT[0] for both chip-select during write only.

See also commit d09f199097 ("board: solidrun: clearfog: enable ddr odt0
on write for both chip-select") where this was added to SolidRun
Clearfog board which is using the same System on Module but unlike
Helios-4 without ECC memory.

Signed-off-by: Josua Mayer <josua@solid-run.com>

board/kobol/helios4/helios4.c

@@ -73,7 +73,11 @@ static struct mv_ddr_topology_map board_topology_map = {
 	MV_DDR_CFG_DEFAULT,		/* ddr configuration data source */
 	NOT_COMBINED,			/* ddr twin-die combined */
 	{ {0} },			/* raw spd data */
-	{0}				/* timing parameters */
+	{0},				/* timing parameters */
+	{ {0} },			/* electrical configuration */
+	{0,},				/* electrical parameters */
+	0x30000,			/* ODT configuration */
+	0x3,				/* clock enable mask */
 };
 
 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)