video: tegra20: dc: parameterize V- and H-sync polarities
Based on Thierry Reding's Linux commit: 'commit 1716b1891e1de05e2c20ccafa9f58550f3539717 ("drm/tegra: rgb: Parameterize V- and H-sync polarities")' Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:

committed by
Anatolij Gustschin

parent
eb81700018
commit
8fea3369ee
@@ -443,6 +443,11 @@ enum win_color_depth_id {
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#define WINDOW_D_SELECT BIT(7)
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#define WINDOW_H_SELECT BIT(8)
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/* DC_COM_PIN_OUTPUT_POLARITY1 0x307 */
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#define LHS_OUTPUT_POLARITY_LOW BIT(30)
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#define LVS_OUTPUT_POLARITY_LOW BIT(28)
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#define LSC0_OUTPUT_POLARITY_LOW BIT(24)
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/* DC_DISP_DISP_WIN_OPTIONS 0x402 */
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#define CURSOR_ENABLE BIT(16)
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#define SOR_ENABLE BIT(25)
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@@ -218,8 +218,11 @@ static const u32 rgb_sel_tab[PIN_OUTPUT_SEL_COUNT] = {
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0x00020000,
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};
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static void rgb_enable(struct dc_com_reg *com)
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static void rgb_enable(struct tegra_lcd_priv *priv)
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{
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struct dc_com_reg *com = &priv->dc->com;
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struct display_timing *dt = &priv->timing;
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u32 value;
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int i;
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for (i = 0; i < PIN_REG_COUNT; i++) {
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@@ -228,6 +231,21 @@ static void rgb_enable(struct dc_com_reg *com)
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writel(rgb_data_tab[i], &com->pin_output_data[i]);
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}
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/* configure H- and V-sync signal polarities */
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value = readl(&com->pin_output_polarity[1]);
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if (dt->flags & DISPLAY_FLAGS_HSYNC_LOW)
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value |= LHS_OUTPUT_POLARITY_LOW;
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else
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value &= ~LHS_OUTPUT_POLARITY_LOW;
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if (dt->flags & DISPLAY_FLAGS_VSYNC_LOW)
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value |= LVS_OUTPUT_POLARITY_LOW;
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else
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value &= ~LVS_OUTPUT_POLARITY_LOW;
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writel(value, &com->pin_output_polarity[1]);
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for (i = 0; i < PIN_OUTPUT_SEL_COUNT; i++)
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writel(rgb_sel_tab[i], &com->pin_output_sel[i]);
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}
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@@ -327,7 +345,7 @@ static int tegra_display_probe(struct tegra_lcd_priv *priv,
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basic_init_timer(&priv->dc->disp);
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if (priv->soc->has_rgb)
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rgb_enable(&priv->dc->com);
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rgb_enable(priv);
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if (priv->pixel_clock)
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update_display_mode(priv);
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