Merge patch series "Add support for Infineon S28HL256T and S28HL02GT"

Takahiro Kuwano <Takahiro.Kuwano@infineon.com> says:

Those are 3.0V, 256Mb/2Gb NOR Flash devices with Octal interface.
Same fanctionalities with 1.8V version that are already supported.

Link: https://lore.kernel.org/r/cover.1743575001.git.Takahiro.Kuwano@infineon.com
This commit is contained in:
Tom Rini
2025-04-29 15:27:40 -06:00

View File

@@ -417,8 +417,10 @@ const struct flash_info spi_nor_ids[] = {
{ INFO6("s25fs256t", 0x342b19, 0x0f0890, 128 * 1024, 256, { INFO6("s25fs256t", 0x342b19, 0x0f0890, 128 * 1024, 256,
SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
#ifdef CONFIG_SPI_FLASH_S28HX_T #ifdef CONFIG_SPI_FLASH_S28HX_T
{ INFO("s28hl256t", 0x345a19, 0, 256 * 1024, 128, SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hl512t", 0x345a1a, 0, 256 * 1024, 256, SPI_NOR_OCTAL_DTR_READ) }, { INFO("s28hl512t", 0x345a1a, 0, 256 * 1024, 256, SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hl01gt", 0x345a1b, 0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) }, { INFO("s28hl01gt", 0x345a1b, 0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hl02gt", 0x345a1c, 0, 256 * 1024, 1024, SPI_NOR_OCTAL_DTR_READ | NO_CHIP_ERASE) },
{ INFO("s28hs256t", 0x345b19, 0, 256 * 1024, 128, SPI_NOR_OCTAL_DTR_READ) }, { INFO("s28hs256t", 0x345b19, 0, 256 * 1024, 128, SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hs512t", 0x345b1a, 0, 256 * 1024, 256, SPI_NOR_OCTAL_DTR_READ) }, { INFO("s28hs512t", 0x345b1a, 0, 256 * 1024, 256, SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hs01gt", 0x345b1b, 0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) }, { INFO("s28hs01gt", 0x345b1b, 0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) },