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Merge https://source.denx.de/u-boot/custodians/u-boot-spi

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CI: https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/22949
This commit is contained in:
Tom Rini
2024-10-24 09:13:45 -06:00
parent 7af813341d a3384940ed
commit a0e808dd0f
2 changed files with 36 additions and 0 deletions
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5
drivers/mtd/spi/Kconfig
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@@ -176,6 +176,11 @@ config SPI_FLASH_MACRONIX
help
Add support for various Macronix SPI flash chips (MX25Lxxx)
config SPI_FLASH_PUYA
bool "Puya Semiconductor SPI flash support"
help
Add support for various Puya Semiconductor SPI flash chips (P25xxx)
config SPI_FLASH_SILICONKAISER
bool "Silicon Kaiser SPI flash support"
help

31
drivers/mtd/spi/spi-nor-ids.c
View File

@@ -294,6 +294,36 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("mx25uw6445g", 0xc28137, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) },
{ INFO("mx25uw6345g", 0xc28437, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) },
#endif
#ifdef CONFIG_SPI_FLASH_PUYA
/* Puya Semiconductor (Shanghai) Co., Ltd */
{ INFO
("p25q05h", 0x856010, 0, 64 * 1024, 1,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q10h", 0x856011, 0, 64 * 1024, 2,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q20h", 0x856012, 0, 64 * 1024, 4,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q40h", 0x856013, 0, 64 * 1024, 8,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q80h", 0x856014, 0, 64 * 1024, 16,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q16h", 0x856015, 0, 64 * 1024, 32,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q32h", 0x856016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q64h", 0x856017, 0, 64 * 1024, 128,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO
("p25q128h", 0x856018, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
#endif
#ifdef CONFIG_SPI_FLASH_SILICONKAISER
{ INFO("sk25lp128", 0x257018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
@@ -328,6 +358,7 @@ const struct flash_info spi_nor_ids[] = {
#ifdef CONFIG_SPI_FLASH_MT35XU
{ INFO("mt35xl512aba", 0x2c5a1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) },
{ INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) },
{ INFO("mt35xu01gaba", 0x2c5b1b, 0, 128 * 1024, 1024, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
#endif /* CONFIG_SPI_FLASH_MT35XU */
{ INFO6("mt35xu01g", 0x2c5b1b, 0x104100, 128 * 1024, 1024, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
{ INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },