board: xiaomi: mocha: add Xiaomi Mi Pad A0101 support
The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which originally ran the Android operating system. The Mi Pad has a 7.9" IPS display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB of internal memory that can be supplemented with a microSDXC card giving up to 128 GB of additional storage. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This commit is contained in:
Svyatoslav Ryhel
@@ -121,6 +121,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += \
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tegra124-nyan-big.dtb \
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tegra124-cei-tk1-som.dtb \
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tegra124-venice2.dtb \
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tegra124-xiaomi-mocha.dtb \
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tegra186-p2771-0000-000.dtb \
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tegra186-p2771-0000-500.dtb \
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tegra210-p2371-0000.dtb \
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592
arch/arm/dts/tegra124-xiaomi-mocha.dts
Normal file
592
arch/arm/dts/tegra124-xiaomi-mocha.dts
Normal file
@@ -0,0 +1,592 @@
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "tegra124.dtsi"
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/ {
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model = "Xiaomi Mi Pad A0101";
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compatible = "xiaomi,mocha", "nvidia,tegra124";
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chosen {
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stdout-path = &uartd;
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};
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aliases {
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i2c0 = &pwr_i2c;
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i2c1 = &gen1_i2c;
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mmc0 = &sdmmc4; /* eMMC */
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mmc1 = &sdmmc3; /* uSD slot */
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usb0 = &usb1;
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x80000000>;
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};
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host1x@50000000 {
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dsia: dsi@54300000 {
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status = "okay";
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avdd-dsi-csi-supply = <&avdd_dsi_csi>;
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nvidia,ganged-mode = <&dsib>;
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panel@0 {
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compatible = "sharp,lq079l1sx01";
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reg = <0>;
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link2 = <&panel_secondary>;
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avdd-supply = <&avdd_lcd>;
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vddio-supply = <&vdd_lcd_io>;
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vsp-supply = <&vsp_5v5_lcd>;
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vsn-supply = <&vsn_5v5_lcd>;
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reset-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_LOW>;
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backlight = <&lp8556>;
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};
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};
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dsib: dsi@54400000 {
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status = "okay";
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avdd-dsi-csi-supply = <&avdd_dsi_csi>;
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panel_secondary: panel@0 {
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compatible = "sharp,lq079l1sx01";
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reg = <0>;
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};
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};
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};
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pinmux@70000868 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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/* Keys pinmux */
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keys {
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nvidia,pins = "kb_col0_pq0",
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"kb_col6_pq6",
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"kb_col7_pq7";
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nvidia,function = "rsvd2";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hall-front {
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nvidia,pins = "pi5";
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nvidia,function = "gmi";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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hall-back {
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nvidia,pins = "gpio_w3_aud_pw3";
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nvidia,function = "spi1";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* Leds pinmux */
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bl-en {
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nvidia,pins = "pbb4";
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nvidia,function = "vgp4";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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keys-led {
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nvidia,pins = "ph1";
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nvidia,function = "pwm1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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/* Panel pinmux */
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lcd-rst {
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nvidia,pins = "ph3";
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nvidia,function = "gmi";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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lcd-vsp {
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nvidia,pins = "pi4";
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nvidia,function = "gmi";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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lcd-vsn {
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nvidia,pins = "kb_row10_ps2";
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nvidia,function = "kbc";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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lcd-id {
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nvidia,pins = "kb_row6_pr6";
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nvidia,function = "displaya_alt";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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lcd-pwm {
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nvidia,pins = "ph2";
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nvidia,function = "pwm2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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/* SDMMC3 pinmux */
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sdmmc3-clk {
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nvidia,pins = "sdmmc3_clk_pa6";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc3-cmd {
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nvidia,pins = "sdmmc3_cmd_pa7",
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"sdmmc3_dat0_pb7",
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"sdmmc3_dat1_pb6",
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"sdmmc3_dat2_pb5",
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"sdmmc3_dat3_pb4",
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"sdmmc3_clk_lb_out_pee4",
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"sdmmc3_clk_lb_in_pee5";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc3-cd {
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nvidia,pins = "sdmmc3_cd_n_pv2";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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usd-pwr {
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nvidia,pins = "kb_row0_pr0";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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/* SDMMC4 pinmux */
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sdmmc4-clk {
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nvidia,pins = "sdmmc4_clk_pcc4";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc4-cmd {
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nvidia,pins = "sdmmc4_cmd_pt7",
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"sdmmc4_dat0_paa0",
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"sdmmc4_dat1_paa1",
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"sdmmc4_dat2_paa2",
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"sdmmc4_dat3_paa3",
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"sdmmc4_dat4_paa4",
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"sdmmc4_dat5_paa5",
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"sdmmc4_dat6_paa6",
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"sdmmc4_dat7_paa7";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* I2C pinmux */
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gen1-i2c {
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nvidia,pins = "gen1_i2c_sda_pc5",
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"gen1_i2c_scl_pc4";
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nvidia,function = "i2c1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <1>;
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nvidia,open-drain = <1>;
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};
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gen2-i2c {
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nvidia,pins = "gen2_i2c_scl_pt5",
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"gen2_i2c_sda_pt6";
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nvidia,function = "i2c2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <1>;
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nvidia,open-drain = <1>;
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};
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cam-i2c {
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nvidia,pins = "cam_i2c_scl_pbb1",
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"cam_i2c_sda_pbb2";
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nvidia,function = "i2c3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <1>;
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nvidia,open-drain = <1>;
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};
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ddc-i2c {
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nvidia,pins = "ddc_scl_pv4",
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"ddc_sda_pv5";
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nvidia,function = "i2c4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pwr-i2c {
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nvidia,pins = "pwr_i2c_scl_pz6",
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"pwr_i2c_sda_pz7";
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nvidia,function = "i2cpwr";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,open-drain = <1>;
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};
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dsi-b {
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nvidia,pins = "mipi_pad_ctrl_dsi_b";
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nvidia,function = "dsi_b";
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};
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/* GPIO power/drive control */
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drive-sdio1 {
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nvidia,pins = "drive_sdio1";
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nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
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nvidia,schmitt = <TEGRA_PIN_DISABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <32>;
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nvidia,pull-up-strength = <42>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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};
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drive-sdio3 {
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nvidia,pins = "drive_sdio3";
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nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
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nvidia,schmitt = <TEGRA_PIN_DISABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <20>;
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nvidia,pull-up-strength = <36>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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};
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drive-gma {
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nvidia,pins = "drive_gma";
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nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
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nvidia,schmitt = <TEGRA_PIN_DISABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <1>;
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nvidia,pull-up-strength = <2>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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};
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};
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};
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uartd: serial@70006300 {
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status = "okay";
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};
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gen1_i2c: i2c@7000c000 {
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status = "okay";
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clock-frequency = <400000>;
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lp8556: backlight@2c {
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compatible = "ti,lp8556";
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reg = <0x2c>;
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dev-ctrl = /bits/ 8 <0x83>;
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init-brt = /bits/ 8 <0x1f>;
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power-supply = <&vdd_3v3_sys>;
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enable-supply = <&vddio_1v8_bl>;
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rom-98h {
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rom-addr = /bits/ 8 <0x98>;
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rom-val = /bits/ 8 <0x80>;
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};
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rom-9eh {
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rom-addr = /bits/ 8 <0x9e>;
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rom-val = /bits/ 8 <0x21>;
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};
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rom-a0h {
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rom-addr = /bits/ 8 <0xa0>;
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rom-val = /bits/ 8 <0xff>;
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};
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rom-a1h {
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rom-addr = /bits/ 8 <0xa1>;
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rom-val = /bits/ 8 <0x3f>;
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};
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rom-a2h {
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rom-addr = /bits/ 8 <0xa2>;
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rom-val = /bits/ 8 <0x20>;
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};
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rom-a3h {
|
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rom-addr = /bits/ 8 <0xa3>;
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rom-val = /bits/ 8 <0x00>;
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};
|
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rom-a4h {
|
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rom-addr = /bits/ 8 <0xa4>;
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rom-val = /bits/ 8 <0x72>;
|
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};
|
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|
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rom-a5h {
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rom-addr = /bits/ 8 <0xa5>;
|
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rom-val = /bits/ 8 <0x24>;
|
||||
};
|
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|
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rom-a6h {
|
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rom-addr = /bits/ 8 <0xa6>;
|
||||
rom-val = /bits/ 8 <0x80>;
|
||||
};
|
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|
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rom-a7h {
|
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rom-addr = /bits/ 8 <0xa7>;
|
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rom-val = /bits/ 8 <0xf5>;
|
||||
};
|
||||
|
||||
rom-a8h {
|
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rom-addr = /bits/ 8 <0xa8>;
|
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rom-val = /bits/ 8 <0x24>;
|
||||
};
|
||||
|
||||
rom-a9h {
|
||||
rom-addr = /bits/ 8 <0xa9>;
|
||||
rom-val = /bits/ 8 <0xb2>;
|
||||
};
|
||||
|
||||
rom-aah {
|
||||
rom-addr = /bits/ 8 <0xaa>;
|
||||
rom-val = /bits/ 8 <0x8f>;
|
||||
};
|
||||
|
||||
rom-aeh {
|
||||
rom-addr = /bits/ 8 <0xae>;
|
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rom-val = /bits/ 8 <0x0f>;
|
||||
};
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||||
};
|
||||
};
|
||||
|
||||
pwr_i2c: i2c@7000d000 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
/* Texas Instruments TPS65913 PMIC */
|
||||
pmic: tps65913@58 {
|
||||
compatible = "ti,tps65913";
|
||||
reg = <0x58>;
|
||||
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
ti,system-power-controller;
|
||||
|
||||
palmas_gpio: gpio {
|
||||
compatible = "ti,palmas-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
pinmux {
|
||||
compatible = "ti,tps65913-pinctrl";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&palmas_default>;
|
||||
|
||||
palmas_default: pinmux {
|
||||
pin_gpio4 {
|
||||
pins = "gpio4";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
compatible = "ti,tps65913-pmic";
|
||||
|
||||
regulators {
|
||||
vdd_1v8_vio: smps8 {
|
||||
regulator-name = "vdd_1v8_gen";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_hv_sdmmc: smps9 {
|
||||
regulator-name = "vdd_hv_sdmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
avdd_lcd: ldo2 {
|
||||
regulator-name = "avdd_lcd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
avdd_dsi_csi: ldo5 {
|
||||
regulator-name = "avdd_dsi_csi";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vddio_usd: ldo9 {
|
||||
regulator-name = "vddio_sdmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
avdd_usb: ldousb {
|
||||
regulator-name = "vdd_usb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc3: sdhci@700b0400 {
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
|
||||
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
|
||||
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
|
||||
|
||||
vmmc-supply = <&vdd_hv_sdmmc>;
|
||||
vqmmc-supply = <&vddio_usd>;
|
||||
};
|
||||
|
||||
sdmmc4: sdhci@700b0600 {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
|
||||
vmmc-supply = <&vdd_hv_sdmmc>;
|
||||
vqmmc-supply = <&vdd_1v8_vio>;
|
||||
};
|
||||
|
||||
usb1: usb@7d000000 {
|
||||
status = "okay";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
clk32k_in: clock-32k {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "ref-oscillator";
|
||||
};
|
||||
|
||||
extcon-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
switch-back-hall-sensor {
|
||||
label = "Hall sensor (back)";
|
||||
gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <SW_LID>;
|
||||
};
|
||||
|
||||
switch-front-hall-sensor {
|
||||
label = "Hall sensor (front)";
|
||||
gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <SW_LID>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
key-power {
|
||||
label = "Power";
|
||||
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_ENTER>;
|
||||
};
|
||||
|
||||
key-volume-down {
|
||||
label = "Volume Down";
|
||||
gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_DOWN>;
|
||||
};
|
||||
|
||||
key-volume-up {
|
||||
label = "Volume Up";
|
||||
gpios = <&gpio TEGRA_GPIO(Q, 6) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_3v3_sys: regulator-bl-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_5v0_bl";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
vddio_1v8_bl: regulator-bl-io {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddio_1v8_bl";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
vdd_lcd_io: regulator-lcdvio {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dvdd_lcd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
enable-active-high;
|
||||
gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
vsp_5v5_lcd: regulator-vsp {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "avdd_lcd_vsp";
|
||||
regulator-min-microvolt = <5500000>;
|
||||
regulator-max-microvolt = <5500000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
vsn_5v5_lcd: regulator-vsn {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "avdd_lcd_vsn";
|
||||
regulator-min-microvolt = <5500000>;
|
||||
regulator-max-microvolt = <5500000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@@ -30,6 +30,10 @@ config TARGET_CEI_TK1_SOM
|
||||
the SoC are assigned to which functions, and the PCIEe
|
||||
configuration.
|
||||
|
||||
config TARGET_MOCHA
|
||||
bool "Xiaomi Tegra124 Mi Pad board"
|
||||
select BOARD_LATE_INIT
|
||||
|
||||
config TARGET_NYAN_BIG
|
||||
bool "Google/NVIDIA Nyan-big Chromebook"
|
||||
select BOARD_LATE_INIT
|
||||
@@ -54,5 +58,6 @@ source "board/nvidia/jetson-tk1/Kconfig"
|
||||
source "board/nvidia/nyan-big/Kconfig"
|
||||
source "board/nvidia/venice2/Kconfig"
|
||||
source "board/toradex/apalis-tk1/Kconfig"
|
||||
source "board/xiaomi/mocha/Kconfig"
|
||||
|
||||
endif
|
||||
|
||||
12
board/xiaomi/mocha/Kconfig
Normal file
12
board/xiaomi/mocha/Kconfig
Normal file
@@ -0,0 +1,12 @@
|
||||
if TARGET_MOCHA
|
||||
|
||||
config SYS_BOARD
|
||||
default "mocha"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "xiaomi"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "mocha"
|
||||
|
||||
endif
|
||||
8
board/xiaomi/mocha/MAINTAINERS
Normal file
8
board/xiaomi/mocha/MAINTAINERS
Normal file
@@ -0,0 +1,8 @@
|
||||
MOCHA BOARD
|
||||
M: Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
S: Maintained
|
||||
F: arch/arm/dts/tegra124-xiaomi-mocha.dts
|
||||
F: board/xiaomi/mocha/
|
||||
F: configs/mocha_defconfig
|
||||
F: doc/board/xiaomi/mocha.rst
|
||||
F: include/configs/mocha.h
|
||||
9
board/xiaomi/mocha/Makefile
Normal file
9
board/xiaomi/mocha/Makefile
Normal file
@@ -0,0 +1,9 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
#
|
||||
# Copyright (c) 2024, Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
#
|
||||
|
||||
obj-$(CONFIG_XPL_BUILD) += mocha-spl.o
|
||||
|
||||
obj-y += mocha.o
|
||||
|
||||
49
board/xiaomi/mocha/mocha-spl.c
Normal file
49
board/xiaomi/mocha/mocha-spl.c
Normal file
@@ -0,0 +1,49 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Mocha SPL stage configuration
|
||||
*
|
||||
* (C) Copyright 2024
|
||||
* Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
*/
|
||||
|
||||
#include <asm/arch/tegra.h>
|
||||
#include <asm/arch-tegra/tegra_i2c.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#define TPS65913_I2C_ADDR (0x58 << 1)
|
||||
|
||||
#define TPS65913_SMPS12_CTRL 0x20
|
||||
#define TPS65913_SMPS12_VOLTAGE 0x23
|
||||
#define TPS65913_SMPS45_CTRL 0x28
|
||||
#define TPS65913_SMPS45_VOLTAGE 0x2B
|
||||
#define TPS65913_SMPS7_CTRL 0x30
|
||||
#define TPS65913_SMPS7_VOLTAGE 0x33
|
||||
|
||||
#define TPS65913_SMPS12_CTRL_DATA (0x5100 | TPS65913_SMPS12_CTRL)
|
||||
#define TPS65913_SMPS12_VOLTAGE_DATA (0x3800 | TPS65913_SMPS12_VOLTAGE)
|
||||
#define TPS65913_SMPS45_CTRL_DATA (0x5100 | TPS65913_SMPS45_CTRL)
|
||||
#define TPS65913_SMPS45_VOLTAGE_DATA (0x3800 | TPS65913_SMPS45_VOLTAGE)
|
||||
#define TPS65913_SMPS7_CTRL_DATA (0x5100 | TPS65913_SMPS7_CTRL)
|
||||
#define TPS65913_SMPS7_VOLTAGE_DATA (0x4700 | TPS65913_SMPS7_VOLTAGE)
|
||||
|
||||
void pmic_enable_cpu_vdd(void)
|
||||
{
|
||||
/* Set CORE VDD to 1.150V. */
|
||||
tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS7_VOLTAGE_DATA);
|
||||
udelay(1000);
|
||||
tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS7_CTRL_DATA);
|
||||
|
||||
udelay(1000);
|
||||
|
||||
/* Set CPU VDD to 1.0V. */
|
||||
tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_VOLTAGE_DATA);
|
||||
udelay(1000);
|
||||
tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_CTRL_DATA);
|
||||
udelay(10 * 1000);
|
||||
|
||||
/* Set GPU VDD to 1.0V. */
|
||||
tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_VOLTAGE_DATA);
|
||||
udelay(1000);
|
||||
tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_CTRL_DATA);
|
||||
udelay(10 * 1000);
|
||||
}
|
||||
41
board/xiaomi/mocha/mocha.c
Normal file
41
board/xiaomi/mocha/mocha.c
Normal file
@@ -0,0 +1,41 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2024
|
||||
* Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
*/
|
||||
|
||||
#include <dm.h>
|
||||
#include <fdt_support.h>
|
||||
#include <i2c.h>
|
||||
#include <log.h>
|
||||
|
||||
#ifdef CONFIG_MMC_SDHCI_TEGRA
|
||||
|
||||
#define TPS65913_I2C_ADDRESS 0x58
|
||||
#define TPS65913_PRIMARY_SECONDARY_PAD2 0xfb
|
||||
#define GPIO_4 BIT(0)
|
||||
#define TPS65913_PRIMARY_SECONDARY_PAD3 0xfe
|
||||
#define DVFS2 BIT(1)
|
||||
#define DVFS1 BIT(0)
|
||||
|
||||
/* We are using this function only till palmas pinctrl driver is available */
|
||||
void pin_mux_mmc(void)
|
||||
{
|
||||
struct udevice *dev;
|
||||
int ret;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(0, TPS65913_I2C_ADDRESS, 1, &dev);
|
||||
if (ret) {
|
||||
log_debug("%s: cannot find PMIC I2C chip\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
/* GPIO4 function has to be GPIO */
|
||||
dm_i2c_reg_clrset(dev, TPS65913_PRIMARY_SECONDARY_PAD2,
|
||||
GPIO_4, 0);
|
||||
|
||||
/* DVFS1 and DVFS2 are disabled */
|
||||
dm_i2c_reg_clrset(dev, TPS65913_PRIMARY_SECONDARY_PAD3,
|
||||
DVFS2 | DVFS1, 0);
|
||||
}
|
||||
#endif
|
||||
23
board/xiaomi/mocha/mocha.env
Normal file
23
board/xiaomi/mocha/mocha.env
Normal file
@@ -0,0 +1,23 @@
|
||||
#include <env/nvidia/prod_upd.env>
|
||||
|
||||
button_cmd_0_name=Volume Down
|
||||
button_cmd_0=bootmenu
|
||||
button_cmd_1_name=Hall sensor (back)
|
||||
button_cmd_1=poweroff
|
||||
button_cmd_1_name=Hall sensor (front)
|
||||
button_cmd_1=poweroff
|
||||
|
||||
partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}
|
||||
|
||||
boot_block_size_r=0x400000
|
||||
boot_block_size=0x2000
|
||||
boot_dev=1
|
||||
|
||||
bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu
|
||||
bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu
|
||||
bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu
|
||||
bootmenu_3=update bootloader=run flash_uboot
|
||||
bootmenu_4=reboot RCM=enterrcm
|
||||
bootmenu_5=reboot=reset
|
||||
bootmenu_6=power off=poweroff
|
||||
bootmenu_delay=-1
|
||||
91
configs/mocha_defconfig
Normal file
91
configs/mocha_defconfig
Normal file
@@ -0,0 +1,91 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_TEGRA=y
|
||||
CONFIG_SUPPORT_PASSING_ATAGS=y
|
||||
CONFIG_CMDLINE_TAG=y
|
||||
CONFIG_INITRD_TAG=y
|
||||
CONFIG_TEXT_BASE=0x80110000
|
||||
CONFIG_SYS_MALLOC_LEN=0x2500000
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_ENV_SOURCE_FILE="mocha"
|
||||
CONFIG_ENV_SIZE=0x3000
|
||||
CONFIG_ENV_OFFSET=0xFFFFD000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="tegra124-xiaomi-mocha"
|
||||
CONFIG_SPL_STACK=0x800ffffc
|
||||
CONFIG_SPL_TEXT_BASE=0x80108000
|
||||
CONFIG_SYS_LOAD_ADDR=0x82000000
|
||||
CONFIG_TEGRA124=y
|
||||
CONFIG_TARGET_MOCHA=y
|
||||
CONFIG_TEGRA_ENABLE_UARTD=y
|
||||
CONFIG_CMD_EBTUPDATE=y
|
||||
CONFIG_TEGRA_GPU=y
|
||||
CONFIG_BUTTON_CMD=y
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_KEYED_CTRLC=y
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_BOOTCOMMAND="bootflow scan; echo 'Boot configuration not found... Power off in 3 sec'; sleep 3; poweroff"
|
||||
CONFIG_SYS_PBSIZE=2086
|
||||
CONFIG_SPL_FOOTPRINT_LIMIT=y
|
||||
CONFIG_SPL_MAX_FOOTPRINT=0x8000
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_SYS_MALLOC=y
|
||||
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
||||
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80090000
|
||||
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
|
||||
CONFIG_SYS_PROMPT="Tegra124 (Mocha) # "
|
||||
# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
|
||||
CONFIG_CMD_BOOTMENU=y
|
||||
# CONFIG_CMD_IMI is not set
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_GPT_RENAME=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_POWEROFF=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
CONFIG_CMD_UMS_ABORT_KEYED=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_PAUSE=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SYS_MMC_ENV_PART=2
|
||||
CONFIG_BUTTON=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x91000000
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x10000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_PALMAS_GPIO=y
|
||||
CONFIG_SYS_I2C_TEGRA=y
|
||||
CONFIG_BUTTON_KEYBOARD=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_PALMAS=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_PALMAS=y
|
||||
CONFIG_PWM_TEGRA=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SYSRESET_PALMAS=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_TEGRA=y
|
||||
CONFIG_USB_KEYBOARD=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Xiaomi"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
|
||||
CONFIG_CI_UDC=y
|
||||
CONFIG_VIDEO=y
|
||||
CONFIG_VIDEO_BRIDGE=y
|
||||
# CONFIG_VIDEO_FONT_8X16 is not set
|
||||
CONFIG_VIDEO_FONT_16X32=y
|
||||
# CONFIG_VIDEO_LOGO is not set
|
||||
CONFIG_VIDEO_LCD_SHARP_LQ079L1SX01=y
|
||||
CONFIG_BACKLIGHT_LP855x=y
|
||||
CONFIG_VIDEO_DSI_TEGRA30=y
|
||||
@@ -69,4 +69,5 @@ Board-specific doc
|
||||
variscite/index
|
||||
wexler/index
|
||||
xen/index
|
||||
xiaomi/index
|
||||
xilinx/index
|
||||
|
||||
9
doc/board/xiaomi/index.rst
Normal file
9
doc/board/xiaomi/index.rst
Normal file
@@ -0,0 +1,9 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
Xiaomi
|
||||
======
|
||||
|
||||
.. toctree::
|
||||
:maxdepth: 2
|
||||
|
||||
mocha
|
||||
112
doc/board/xiaomi/mocha.rst
Normal file
112
doc/board/xiaomi/mocha.rst
Normal file
@@ -0,0 +1,112 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
U-Boot for the Xiaomi Mi Pad tablet
|
||||
===================================
|
||||
|
||||
``DISCLAMER!`` Moving your Xiaomi Mi Pad to use U-Boot assumes replacement
|
||||
of the vendor bootloader. Vendor Android firmwares will no longer be able
|
||||
to run on the device. This replacement IS reversible.
|
||||
|
||||
Quick Start
|
||||
-----------
|
||||
|
||||
- Build U-Boot
|
||||
- Boot U-Boot
|
||||
- Process and flash U-Boot
|
||||
- Boot Linux
|
||||
- Self Upgrading
|
||||
- Chainload configuration
|
||||
|
||||
Build U-Boot
|
||||
------------
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ export CROSS_COMPILE=arm-none-eabi-
|
||||
$ make mocha_defconfig
|
||||
$ make
|
||||
|
||||
After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
|
||||
image, ready for booting or further processing.
|
||||
|
||||
Boot U-Boot
|
||||
-----------
|
||||
Existing tegrarcm loader can be used to pre-load U-Boot you have build
|
||||
into RAM and basically perform a tethered cold-boot.
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ tegrarcm --bct mocha.bct --bootloader u-boot-dtb-tegra.bin --loadaddr 0x80108000
|
||||
|
||||
U-Boot will try to load Linux kernel and if fails, it will turn the
|
||||
tablet off. While pre-loading U-Boot, hold the ``volume down`` button
|
||||
which will trigger the bootmenu.
|
||||
|
||||
Process and flash U-Boot
|
||||
------------------------
|
||||
|
||||
``DISCLAMER!`` All questions related to the re-crypt work should be asked
|
||||
in re-crypt repo issues. NOT HERE!
|
||||
|
||||
re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into
|
||||
form usable by device. This process is required only on the first
|
||||
installation or to recover the device in case of a failed update.
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ git clone https://gitlab.com/grate-driver/re-crypt.git
|
||||
$ cd re-crypt # place your u-boot-dtb-tegra.bin here
|
||||
$ ./re-crypt.py --dev mocha
|
||||
|
||||
The script will produce ``bct.img`` and ``ebt.img`` ready to flash.
|
||||
|
||||
Permanent installation can be performed by pre-loading just built U-Boot
|
||||
into RAM via tegrarcm. While pre-loading U-Boot, hold the ``volume down``
|
||||
button which will trigger the bootmenu. There, select ``fastboot`` using
|
||||
the volume and power buttons.
|
||||
|
||||
After, on host PC, do:
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ fastboot flash 0.1 bct.img
|
||||
$ fastboot flash 0.2 ebt.img
|
||||
$ fastboot reboot
|
||||
|
||||
Device will reboot.
|
||||
|
||||
Boot Linux
|
||||
----------
|
||||
|
||||
To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
|
||||
eMMC. Additionally, if the ``volume down`` button is pressed while booting, the
|
||||
device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
|
||||
as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console
|
||||
and update bootloader (check the next chapter).
|
||||
|
||||
Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and
|
||||
allows the user to use/partition it in any way the user desires.
|
||||
|
||||
Self Upgrading
|
||||
--------------
|
||||
|
||||
Place your ``u-boot-dtb-tegra.bin`` on the first partition of the MicroSD card
|
||||
and insert it into the tablet. Enter bootmenu, choose update the bootloader
|
||||
option with the Power button and U-Boot should update itself. Once the process
|
||||
is completed, U-Boot will ask to press any button to reboot.
|
||||
|
||||
Chainload configuration
|
||||
-----------------------
|
||||
|
||||
To build U-Boot without SPL suitable for chainloading adjust mocha_defconfig:
|
||||
|
||||
.. code-block::
|
||||
|
||||
CONFIG_TEXT_BASE=0x80A00000
|
||||
CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
# CONFIG_OF_BOARD_SETUP is not set
|
||||
CONFIG_TEGRA_SUPPORT_NON_SECURE=y
|
||||
|
||||
After the build succeeds, you will obtain the final ``u-boot-dtb.bin``
|
||||
file, ready for booting using vendor bootloader's fastboot or which can be
|
||||
further processed into a flashable image.
|
||||
25
include/configs/mocha.h
Normal file
25
include/configs/mocha.h
Normal file
@@ -0,0 +1,25 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
|
||||
*
|
||||
* Copyright (c) 2024, Svyatoslav Ryhel <clamor95@gmail.com>
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include "tegra124-common.h"
|
||||
|
||||
/* High-level configuration options */
|
||||
#define CFG_TEGRA_BOARD_STRING "Xiaomi Mocha"
|
||||
|
||||
/* Board-specific serial config */
|
||||
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
|
||||
|
||||
#ifdef CONFIG_TEGRA_SUPPORT_NON_SECURE
|
||||
#define CFG_PRAM 0x38400 /* 225 MB */
|
||||
#endif
|
||||
|
||||
#include "tegra-common-post.h"
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Reference in New Issue
Block a user