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riscv: dts: t-head: Add sdhci and emmc nodes

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Add SDHCI and EMMC controlles nodes on TH-1520 SoC. And enable them for
Lichee module 4A.

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
This commit is contained in:
Maksim Kiselev
2024-12-11 23:11:00 +03:00
committed by Leo Yu-Chi Liang
parent 1cf3e900af
commit dced3ec324
2 changed files with 52 additions and 0 deletions
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18
arch/riscv/dts/th1520-lichee-module-4a.dtsi
View File

@@ -32,3 +32,21 @@
&uart_sclk {
clock-frequency = <100000000>;
};
&emmc {
bus-width = <8>;
max-frequency = <198000000>;
mmc-ddr-1_8v;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
no-sdio;
no-sd;
status = "okay";
};
&sdio0 {
bus-width = <4>;
max-frequency = <198000000>;
status = "okay";
};

34
arch/riscv/dts/th1520.dtsi
View File

@@ -134,6 +134,13 @@
#clock-cells = <0>;
};
sdhci_clk: sdhci-clock {
compatible = "fixed-clock";
clock-frequency = <198000000>;
clock-output-names = "sdhci_clk";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
interrupt-parent = <&plic>;
@@ -173,6 +180,33 @@
status = "disabled";
};
emmc: mmc@ffe7080000 {
compatible = "thead,th1520-dwcmshc";
reg = <0xff 0xe7080000 0x0 0x10000>;
interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sdhci_clk>;
clock-names = "core";
status = "disabled";
};
sdio0: mmc@ffe7090000 {
compatible = "thead,th1520-dwcmshc";
reg = <0xff 0xe7090000 0x0 0x10000>;
interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sdhci_clk>;
clock-names = "core";
status = "disabled";
};
sdio1: mmc@ffe70a0000 {
compatible = "thead,th1520-dwcmshc";
reg = <0xff 0xe70a0000 0x0 0x10000>;
interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sdhci_clk>;
clock-names = "core";
status = "disabled";
};
uart1: serial@ffe7f00000 {
compatible = "snps,dw-apb-uart";
reg = <0xff 0xe7f00000 0x0 0x100>;