clk: mediatek: mt7981: swap wrong clock-names for spi nodes
Swap wrong clock-names for spi nodes as they were wrong and the spi-clk was referencing the sel-clk and the sel-clk was referencing the spi-clk. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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committed by
Tom Rini

parent
37476e7eae
commit
f8a58bb2b5
@@ -271,7 +271,7 @@
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<&infracfg CK_INFRA_SPI0_SEL>;
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assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
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<&topckgen CK_INFRA_ISPI0>;
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clock-names = "sel-clk", "spi-clk";
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clock-names = "spi-clk", "sel-clk";
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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@@ -286,7 +286,7 @@
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<&infracfg CK_INFRA_SPI1_SEL>;
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assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
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<&topckgen CK_INFRA_ISPI1>;
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clock-names = "sel-clk", "spi-clk";
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clock-names = "spi-clk", "sel-clk";
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status = "disabled";
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};
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@@ -299,7 +299,7 @@
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<&infracfg CK_INFRA_SPI2_SEL>;
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assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
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<&topckgen CK_INFRA_ISPI0>;
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clock-names = "sel-clk", "spi-clk";
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clock-names = "spi-clk", "sel-clk";
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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