Commit Graph

99765 Commits

Author SHA1 Message Date
Heinrich Schuchardt
285d265f7d Dockerfile: use lz4 instead of lz4-tools
Since Ubuntu Jammy lz4-tools is only a virtual package which pulls in
lz4 as dependency.

Update documentation too.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-05-09 15:08:09 -06:00
Anshul Dalal
7b03df1b2b board: ti: common: Kconfig: add CMD_CACHE
Add CMD_CACHE to list of configs implied by TI_COMMON_CMD_OPTIONS.
This allows the usage of cache commands from U-Boot prompt.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
2025-05-09 15:07:43 -06:00
Udit Kumar
df7b988ed3 configs: j722s_evm_r5_defconfig: Enable PMIC config
In kernel device tre commit 714d54917147: ("arm64: dts: ti: k3-j722s-evm:
Enable PMIC") adds pmic support.

Above commit of kernel get synched in u-boot by sha ab06a533f08e:("Squashed
'dts/upstream/' changes from 8531b4b4988c..955176a4ff59").

Now, PMIC DT is available in u-boot for J722S EVM,
So enable PMIC in defconfig as well.

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2025-05-09 15:07:37 -06:00
Stephen Warren
e4e564e0d6 disable mail for swarren
I haven't been involved in U-Boot development for quite a while, so
CCing me on patches isn't currently useful. Add a .mailmap entry that I
believe will turn off patch CCs. This can always be removed if I become
active again! Remove myself from a few MAINTAINERS failed and the git
mailrc file too.
2025-05-09 15:05:14 -06:00
Nikunj Kela
fff21d27a9 net: dwc: xgmac: Allow DMA buffers above 4GB
Currently, Synopsis xgmac driver only works if DMA region is under 4GB.
This change enables the DMA buffers allocations above 4GB memory
regions.

Signed-off-by: Nikunj Kela <nikunj.kela@sima.ai>
2025-05-09 15:02:38 -06:00
Tom Rini
0678231430 x86: Correct usage of FSP_VERSION2
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case, we move to having a
"default FSP_VERSION2 if INTEL_APOLLOLAKE" in order to get the desired
outcome.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-09 12:57:32 -06:00
Naresh Solanki
c73acdb392 x86: spl: Add support for NVMe boot device
This change adds `BOOT_DEVICE_NVME` to the `enum` list in
`arch/x86/include/asm/spl.h`,
enabling NVMe as a recognized boot device for SPL (Secondary Program
Loader).

Tested x86 hardware with coreboot + U-Boot payload.
Verified successful boot to NVMe drive.

Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-05-09 12:57:09 -06:00
Tom Rini
c5f57de37c gpio: x86: Correct usage of IS_ENABLED() macro in intel_pinctrl_defs.h
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-09 10:42:09 -06:00
Tom Rini
cd2dc5f448 x86: Correct usage of IS_ENABLED() macro in arch/x86/lib/spl.c
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-09 10:42:07 -06:00
Tom Rini
4cc29d0109 x86: apl: Correct usage of IS_ENABLED() macro in acpi-pmc-uclass.c
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-09 10:39:48 -06:00
Andy Shevchenko
f183d2c56b x86: cpu: Describe board final hooks in the header
The new two declarations board_final_init() and board_final_cleanup()
need a description. Add it here.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-05-09 10:39:27 -06:00
Tom Rini
ffd5d9cc27 Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra 2025-05-08 09:22:25 -06:00
Tom Rini
ac204f07b2 Merge tag 'u-boot-rockchip-20250508' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/26117

- New Board support: rk3566 LCKFB TaishanPi, rk3588 Xunlong Orange Pi 5
  Max;
- Add rk3288 rmii support;
- pinctrl driver fix;
- binman description update;
2025-05-08 08:29:17 -06:00
Svyatoslav Ryhel
d5b9b7aa03 ARM: tegra: drop CONFIG_DISABLE_SDMMC1_EARLY
This was a temporary workaround for the Tegra210 Jetson Nano board. It is
not used by any device anymore, so let's remove it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:31:13 +03:00
Svyatoslav Ryhel
66c4ac31ca ARM: tegra: set default SYS_CONFIG_NAME from SoC Kconfig
Since most boards now use the same generic device config header, move its
setup to SoC Kconfig instead of setting SYS_CONFIG_NAME in each board's
Kconfig.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:31:13 +03:00
Svyatoslav Ryhel
7187408553 ARM: tegra: convert boards to use TEGRA_PRAM
Switch boards that use CFG_PRAM to TEGRA_PRAM.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:31:13 +03:00
Svyatoslav Ryhel
94b395cc2d ARM: tegra: add PRAM Kconfig option
Wrap CFG_PRAM with Kconfig option.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:31:12 +03:00
Svyatoslav Ryhel
24e578cbac board: lg: star: add Optimus 2X P990 support
The LG Optimus 2X is a touchscreen-based, slate-sized smartphone designed
and manufactured by LG that runs the Android operating system. The
Optimus 2X features a 4" WVGA display, an Nvidia Tegra 2 dual-core chip,
512 MB of RAM and extendable 8 GB of internal storage. UART-B is default
debug port.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
bf2d1902f4 video: backlight: add Skyworks/Analogictech AAT2870 led controller driver
Add support for Skyworks AAT2870 LED Backlight Driver and Multiple LDO
Lighting Management Unit. Only backlight is supported as for now. Supported
backlight level range is from 2 to 255 with step of 1.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
cb9c3024d1 video: panel: add LG LH400WV3-SD04 MIPI DSI panel driver
LG LH400WV3-SD04 is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD). The resolution of a 4" contains 480 x 800
pixels.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
7eb99ba543 video: panel: add Hitachi TX10D07VM0BAA MIPI DSI panel driver
Hitachi TX10D07VM0BAA is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD). The resolution of a 4" contains 480 x 800
pixels.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
505dd92275 video: tegra: add 8-bit CPU driven protocol
Add support for 8-bit CPU driven (primary and secondary) display signal
interface found in Tegra 2 and Tegra 3 SoC.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
5f3588a94d sysreset: implement MAX9807 sysreset functions
MAX8907 PMIC has embedded poweroff function used by some device to initiane
device power off. Implement it as optional sysreset driver guarded by
kconfig option and system-power-controller device tree property.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
5204a362b8 power: regulator: max9807: add regulator support
Added a new regulator driver for the MAXIM MAX8907 PMIC, providing
essential regulator functionalities and incorporated the necessary binding
framework within the core PMIC driver.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
68d1b0f84a power: pmic: add the base MAX8907 PMIC support
Add basic i2c based read/write functions to access PMIC registers.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Svyatoslav Ryhel
a87b564018 gpio: tegra_gpio: implement rfree operation
Releasing a GPIO on Tegra necessitates changing its configuration to SFIO
to activate its special function. Without this reconfiguration, the special
function will be unavailable.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Christoph Fritz
115a0cb9a2 net: gmac_rockchip: Add RMII support for rk3288
Add RMII-specific handling to rk3288_gmac_fix_mac_speed() so that it
properly sets the RMII clock (2.5 MHz vs. 25 MHz) and speed bits
(10 Mbps vs. 100 Mbps). Also define a new rk3288_gmac_set_to_rmii()
function to set the PHY interface field and RMII_MODE bit.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:48:13 +08:00
Christoph Fritz
b8ce3eb8bf rockchip: rk3288: grf: Unify speed/flowctrl fields for clarity
Update GMAC speed and flow control fields in GRF_SOC_CON1 to use
RK3288_GMAC_* prefix, ensuring a consistent naming convention. It also
shifts each mask/bit definition to match the actual hardware bits, which
makes future usage easier.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:48:13 +08:00
Jiehui He
656b70b5ff board: rockchip: Add LCKFB TaishanPi RK3566 Board
The LCKFB TaishanPi is a single-board computer based on the RK3566 SoC.

Specification:
- 1/2 Gib RAM
- Optinal EMMC
- SD-Card
- HDMI / MIPI CSI / MIPI DSI
- USB 2.0 Host (Type-A)
- USB 2.0 Host / OTG (Type-C)
- No Ethernet

This patch adds U-Boot support for the LCKFB TaishanPi RK3566 board, including:
- U-Boot device tree
- Default defconfig
- Board documentation
- MAINTAINERS entry

Changes in v2:
- Removed unused configs from `lckfb-tspi-rk3566_defconfig`
- Reordered TaishanPi entry in `doc/board/rockchip/rockchip.rst` alphabetically

Link to v1:
https://lore.kernel.org/u-boot/tencent_95ED0C0545D87B6A8C4B62EC045D53AD2406@qq.com/

Signed-off-by: Jiehui He <jiehui.he@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:47:20 +08:00
Ilya Katsnelson
15d76136fb board: rockchip: add Xunlong Orange Pi 5 Max
The 5 Max is another board in the Orange Pi 5 family.

It's overall similar to the 5 Plus, but in a smaller form factor,
which leads to some I/O being reshuffled, but nothing relevant
to u-boot.

So, just reuse the config for the 5 Plus and adjust the DT names.

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Ilya Katsnelson <me@0upti.me>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:47:06 +08:00
Tom Rini
48db49b097 Merge patch series "include: env: phytec: k3_net: Remove net_apply_extensions"
This series from Daniel Schultz <d.schultz@phytec.de> cleans up the
environment further on the phytec am62ax platforms.

Link: https://lore.kernel.org/r/20250428144904.1058574-1-d.schultz@phytec.de
2025-05-07 07:59:09 -06:00
Daniel Schultz
fd446b0c84 board: phytec: phycore_am62ax: Update Environment
Add fit_addr_r to the environment to allow us to boot from a FIT image.

Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-05-07 07:59:03 -06:00
Daniel Schultz
ad2ae4d2b2 include: env: phytec: k3_net: Use get_cmd
'net_fetch_cmd' is not defined by the K3 board files. They
use the more common 'get_cmd' from NXP products.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2025-05-07 07:59:03 -06:00
Daniel Schultz
e75070a8f4 include: env: phytec: k3_net: Remove net_apply_extensions
Extensions are now handled by the board-code. Remove this non-existing
function to proper boot from network.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2025-05-07 07:59:03 -06:00
Tom Rini
3b6760ddeb bootstd: Rework BLK dependency
The bootstd code itself does not have any dependency on BLK in order to
build. However, in order to minimize size growth of non-migrated
platforms, change this from being "default y" to "default y if BLK".
This will make it easier to begin migration of platforms which do not
have any BLK-class device but do want to use bootstd.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-06 15:47:36 -06:00
Bryan Brattlof
13d1bd5bbb mips: octeon: remove unused middle expression
!A || (A && B) is equivalent to !A || B

Drop the unused middle expression to simplify the statement.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2025-05-06 15:43:19 -06:00
Venkatesh Yadav Abbarapu
46b3580c59 mtd: spi-nor: Send write disable cmd after every write enable
Write enable(06h) command will be sent to a flash device to
set the write enable latch bit before every program, erase,
write command. After that write disable command (04h) needs
to be sent to clear the write enable latch.

This write_disable() is missing at the majority of the places
in the driver, add it to clear write enable latch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b
Tested-by: Prasanth Babu Mantena <p-mantena@ti.com>
2025-05-06 13:13:36 -06:00
Vaishnav Achath
ea2c6df478 mtd: spi-nor-core: Fixup SNOR_F_IO_MODE_EN_VOLATILE for MT35X
MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table
in  SFDP. commit bebdc23750 ("mtd: spi-nor: Parse SFDP SCCR Map")
added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD
in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device
supports octal DTR mode, add this property in SFDP fixup.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2025-05-06 13:12:43 -06:00
Heiko Stuebner
2d6346d901 configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS for px30 to rk3308/etc
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an
memory overlap, resulting in the not 100% helpful message of
"This will not be a case any time" from lmb_fix_over_lap_regions().

Adding a bit of debug info to lmb_fix_over_lap_regions() brings:
lmb_fix_over_lap_regions: base1 0x280000-0x6005ac > base2 0x600000-0x6000d1

So this is because the FIT image gets loaded to the kernel_addr_r at
0x280000 while the pxe-file is already living at 0x600000, only 3.5MB
behind.

In commit 4acc8bb044 ("configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS
for rk3308, rk3328, and rk3399") FUKAUMI Naoki already brought the memory
layouts for the mentioned socs in sync.

Adjusting the env-layout on px30 to this scheme, magically solves the
overlap issue and also brings px30 more in line with the other mentioned
SoCs.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 17:59:12 +08:00
Chen-Yu Tsai
64f670f75f rockchip: io-domain: Enable by default for all supported SoCs
The IO domain driver controls the I/O voltage for various pins,
MMC included.

Enable it by default for all supported Rockchip SoCs.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
2025-05-06 16:12:06 +08:00
Quentin Schulz
735fb2d7ee pinctrl: rockchip: constify rockchip_pin_ctrl for RV1108
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
60a2c563b7 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3399
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
b8c273247c pinctrl: rockchip: constify rockchip_pin_ctrl for RK3368
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
0468683344 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3328
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
4d4e4d502b pinctrl: rockchip: constify rockchip_pin_ctrl for RK3308
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
8475f52604 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3288
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
1b85862d7e pinctrl: rockchip: constify rockchip_pin_ctrl for RK3228
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
8ac01d7965 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3188
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
8881eb7317 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3128
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin Schulz
cb27ad9a10 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3066
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00