Marek Vasut
e965c89008
ARM: rmobile: Handle R8A7796 r1.1 in the PRR code
...
The R8A7796 r1.1 reports itself as r2.0 , add quirk into the
PRR code to fix this report.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:26 +09:00
Marek Vasut
bc271a0051
ARM: rmobile: Add R8A7796 into the CPU table
...
Add entry for the R8A7796 RCar M3 SoC into the CPU info table.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Marek Vasut
3a38c7d0d8
ARM: rmobile: Add R8A7795 into the CPU table
...
Add entry for the R8A7795 RCar H3 SoC into the CPU info table.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Marek Vasut
a0f6404649
ARM: rmobile: Make the Gen3 SoC configurable
...
Allow selecting the Gen3 SoC in preparation for RCar M3 .
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Marek Vasut
43c8352e3e
ARM: rmobile: Update link address to match latest BL2
...
Update the CONFIG_SYS_TEXT_BASE to match BL2 Rev.1.0.9 and newer,
which loads the U-Boot to 0x50000000 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Marek Vasut
1b044aa8c5
ARM: rmobile: Zap RCAR_GEN3_EXTRAM_BOOT
...
This Kconfig option is not used on any board, so drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Marek Vasut
8d31fe2a64
ARM: rmobile: Import R8A7796 PFC and GPIO tables
...
Import the R8A7796 PFC and GPIO tables from the latest 3.5.3 release
from Renesas .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Marek Vasut
0dfc2392f6
ARM: rmobile: Update R8A7795 PFC and GPIO tables
...
Sync the PFC and GPIO tables with the latest 3.5.3 release from
Renesas . This adds ES2.0 support.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Hiroyuki Yokoyama
b7cebcb977
serial: sh: Add r8a7796 support
...
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
2017-05-22 04:38:25 +09:00
Marek Vasut
8ae51b6f32
net: ravb: Add Renesas Ethernet RAVB driver
...
Add driver for the Renesas Ethernet AVB block found in RCar H3/M3.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
Cc: Tom Rini <trini@konsulko.com >
Cc: Joe Hershberger <joe.hershberger@ni.com >
Based on work of:
Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Takeshi Kihara <takeshi.kihara.df@renesas.com >
Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com >
2017-05-22 04:38:24 +09:00
Kouei Abe
1815c29738
gpio: rcar_gen3: Fix GPIO read support
...
This patch fixes to read the GPIO status after confirming the
INOUT setting.
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com >
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com >
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org >
Cc: Tom Rini <trini@konsulko.com >
2017-05-22 04:37:30 +09:00
Tom Rini
a375ff8e14
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
2017-05-18 17:17:45 -04:00
Tom Rini
753a4dde97
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
2017-05-18 17:17:42 -04:00
Tom Rini
a0bdf7b31d
Merge branch 'master' of git://git.denx.de/u-boot-usb
2017-05-18 17:17:39 -04:00
Jean-Jacques Hiblot
ad99abe8e7
ARM: dts: am335x-evm: disable mmc3
...
SDIO is not supported in u-boot, there is no point in enabling mmc3.
For this purpose, add u-boot specific dtsi that this will be included
automatically while building the dtb.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com >
Reviewed-by: Tom Rini <trini@konsulko.com >
2017-05-18 17:17:11 -04:00
Tom Rini
7452946e7f
scripts/Makefile.lib: Always have ...-u-boot.dtsi be able to override
...
The intention of having a -u-boot.dtsi file is to be able to make
changes to the provided upstream dts files as well as to be able to add
nodes. Change the logic for adding the file from making it the last
included file at the top of the dts to being included at the end of the
file.
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com >
Cc: Simon Glass <sjg@chromium.org >
Signed-off-by: Tom Rini <trini@konsulko.com >
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com >
Reviewed-by: Simon Glass <sjg@chromium.org >
2017-05-18 17:17:01 -04:00
Stefano Babic
5c84ad097d
Merge branch 'master' of git://git.denx.de/u-boot-imx
...
Signed-off-by: Stefano Babic <sbabic@denx.de >
2017-05-18 11:53:55 +02:00
Ley Foon Tan
d89e979c42
arm: socfpga: Enable build for Arria 10
...
Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:19 +02:00
Ley Foon Tan
9b21de7811
arm: socfpga: Add board files for the Arria10
...
Add support for the Arria10 SoCDK.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:19 +02:00
Ley Foon Tan
1b2594030d
arm: socfpga: Add config and defconfig for Arria 10
...
Add config and defconfig for the Arria10 and update socfpga_common.h.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:19 +02:00
Ley Foon Tan
8f4c80c4fd
arm: socfpga: Add SPL support for Arria 10
...
Add SPL support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:18 +02:00
Ley Foon Tan
3d5f7c5af3
arm: dts: Add dts and dtsi for Arria 10
...
Device tree files for Arria 10
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:18 +02:00
Ley Foon Tan
35b9800ff2
arm: socfpga: Add misc support for Arria 10
...
Add misc support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:18 +02:00
Ley Foon Tan
caf36e1edb
arm: socfpga: Add pinmux for Arria 10
...
Add pinmux support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:18 +02:00
Ley Foon Tan
c887d48017
arm: socfpga: Add sdram header file for Arria 10
...
Add sdram header file for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:18 +02:00
Ley Foon Tan
86f032e630
arm: socfpga: Add system manager for Arria 10
...
Add system manager register struct and macros for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:18 +02:00
Ley Foon Tan
177ba1f927
arm: socfpga: Add clock driver for Arria 10
...
Add clock driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:17 +02:00
Ley Foon Tan
827e6a7e0d
arm: socfpga: Add reset driver support for Arria 10
...
Add reset driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com >
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:17 +02:00
Ley Foon Tan
d83b8193ad
arm: socfpga: Add A10 macros
...
Add i2c, timer and other A10 macros.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:17 +02:00
Ley Foon Tan
d1c559af5f
arm: socfpga: Restructure misc driver
...
Restructure misc driver in the preparation to support A10.
Move the Gen5 specific code to gen5 file.
Change all uint32_t_to u32.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:17 +02:00
Ley Foon Tan
4ddd541d6c
arm: socfpga: Restructure system manager
...
Restructure system manager in the preparation to support A10.
No functional change.
Change uint32_t to u32.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:17 +02:00
Ley Foon Tan
2b09ea48dd
arm: socfpga: Restructure reset manager driver
...
Restructure reset manager driver in the preparation to support A10.
Move the Gen5 specific code to gen5 files.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:17 +02:00
Ley Foon Tan
de77811589
arm: socfpga: Restructure clock manager driver
...
Restructure clock manager driver in the preparation to support A10.
Move the Gen5 specific code to _gen5 files.
- Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
- Check return value from wait_for_bit(). So change return type to int for
cm_write_with_phase() and cm_basic_init().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com >
2017-05-18 11:33:16 +02:00
Liam Beguin
9ad69f0ba4
usb: lpc32xx: add i2c DM support
...
Add DM support for i2c functions.
Signed-off-by: Liam Beguin <lbeguin@tycoint.com >
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com >
Reviewed-by: Marek Vasut <marex@denx.de >
2017-05-18 11:31:56 +02:00
Peng Fan
c1d1e9d677
pinctrl: imx: fix memory leak
...
Each time set_state is called, a new piece memory will
be allocated for pin_data, but not freed, this will
incur memory leak.
When error, the devm API could not free memory automatically.
So need call devm_kfree when error.
Issue reported by Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Simon Glass <sjg@chromium.org >
Cc: Stefan Agner <stefan.agner@toradex.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Stefano Babic
8ae5bb37fc
imx: mx7dsabresd: fix secure config after switching to DM
...
mx7dsabresd_secure_defconfig was not updated after moving to DM.
Signed-off-by: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Peng Fan
d1e204b566
imx: mx7dsabresd: switch to DM USB
...
Switch to use DM USB.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
2017-05-18 11:24:34 +02:00
Peng Fan
709fef5131
imx: mx7dsabresd: reset ENET_RST_B
...
Reset ENET_RST_B to make ENET function stable.
Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds
to ENET_RST_B.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Peng Fan
6fbbcfdf06
imx: mx7dsabresd: enable more DM drivers
...
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled.
So needs to enable them together.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Peng Fan
aab203eb2e
gpio: 74x164: make oe-pins optional
...
Make oe-pins optional because some boards have fixed it to enable.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Simon Glass <sjg@chromium.org >
Cc: Stefano Babic <sbabic@denx.de >
Reviewed-by: Simon Glass <sjg@chromium.org >
2017-05-18 11:24:34 +02:00
Peng Fan
41eb8ff5ea
spi: kconfig: add soft spi Kconfig entry
...
Add the Kconfig entry for SOFT_SPI which uses gpio to simulate the
SPI signals. We use it for accessing 74x164 on some i.MX boards.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Jagan Teki <jagan@openedev.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Peng Fan
e02ec19f4d
arm: dts: imx7d-sdb: add usdhc support
...
Add usdhc support
Signed-off-by: Peng Fan <peng.fan@nxp.com >
2017-05-18 11:24:34 +02:00
Peng Fan
00ad3a9f73
arm: dts: imx7d-sdb: add i2c support
...
Add i2c support.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Peng Fan
63f3401d23
arm: dts: imx7d-sdb: add regulator node for usb and mmc
...
Add regulator node for usb and mmc.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Peng Fan
9880eed8bd
arm: dts: imx7d-sdb: add spi gpio node
...
Add spi gpio node for 74LV595.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:34 +02:00
Peng Fan
896d2e82e6
arm: dts: imx7d-sdb add basic dts
...
Add basic dts for i.MX7D-SDB board.
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:33 +02:00
Peng Fan
993274f485
arm: dts: imx7: sync with Linux
...
Sync with Linux commit 308ac756("Merge tag 'gpio-v4.11-3'").
Signed-off-by: Peng Fan <peng.fan@nxp.com >
Cc: Stefan Agner <stefan.agner@toradex.com >
Cc: Stefano Babic <sbabic@denx.de >
Reviewed-by: Stefano Babic <sbabic@denx.de >
2017-05-18 11:24:33 +02:00
Tim Harvey
9f0a3ac1b2
imx: ventana: update imx wdog external reset dt property
...
Early backports of the imx wdog external reset feature occured before the
property was accepted upstream and used 'ext-reset-output' instead of
'fsl,ext-reset-output'. In order to support older kernels remove both
properties.
Signed-off-by: Tim Harvey <tharvey@gateworks.com >
2017-05-18 11:24:33 +02:00
Tim Harvey
27388d561c
imx: ventana: fix GW520x external watchdog dt update
...
Signed-off-by: Tim Harvey <tharvey@gateworks.com >
2017-05-18 11:24:33 +02:00
Fabio Estevam
e2bab4b9ea
mx6sabresd: Remove non-SPL targets
...
Now that mx6sabresd_spl_defconfig can be used to boot all
mx6sabresd variants, the non-SPL targets can be safely removed.
Signed-off-by: Fabio Estevam <fabio.estvam@nxp.com >
2017-05-18 11:24:33 +02:00