Simon Glass <sjg@chromium.org> says:
When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL
Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.
For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.
This series starts a change in terminology and usage to resolve the
above issues:
- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_
It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.
This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.
The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.
Update the comment in bootstage to refer to this symbol, instead of
SPL_
Signed-off-by: Simon Glass <sjg@chromium.org>
The pmic could be trimed with updated BUCK1 range, so update the range
for trimed pmic. The default value of Toff_Deb is used to distinguish
the non-trimed and trimed pmic.
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The DA9063 PMIC is a multi-function device that provides
regulator, watchdog, RTC, and ON key functionalities.
Add support for the DA9063 PMIC watchdog functionality.
Based on the 6.11 kernel drivers/watchdog/da9063_wdt.c driver.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Both regulators_enable_boot_on/off() are unused and superseded by
regulator uclass regulator_post_probe(). Remove both functions.
Signed-off-by: Marek Vasut <marex@denx.de>
Turn regulators_enable_boot_on() and regulators_enable_boot_off() into
empty functions. Implement matching functionality in regulator_post_probe()
instead. The regulator_post_probe() is called for all regulators after they
probe, and regulators that have regulator-always-on or regulator-boot-on DT
properties now always probe due to DM_FLAG_PROBE_AFTER_BIND being set on
such regulators in regulator_post_bind().
Finally, fold regulator_unset() functionality into regulator_autoset().
Signed-off-by: Marek Vasut <marex@denx.de>
In case a regulator DT node contains regulator-always-on or regulator-boot-on
property, make sure the regulator gets correctly configured by U-Boot on start
up. Unconditionally probe such regulator drivers. This is a preparatory patch
for introduction of .regulator_post_probe() which would trigger the regulator
configuration.
Parsing of regulator-always-on and regulator-boot-on DT property has been
moved to regulator_post_bind() as the information is required early, the
rest of the DT parsing has been kept in regulator_pre_probe() to avoid
slowing down the boot process.
Signed-off-by: Marek Vasut <marex@denx.de>
The buck variable is zero based, i.e. buck=0 match BUCK1 in datasheet.
Remove any buck + 1 calculation to be more consistent in usage of the
buck variable across the different RK8xx variants in the driver.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Wrong POWER_EN reg is used to get and set enabled state for the RK806
buck 4 and 8 regulators, also wrong POWER_SLP_EN0 bit is used for
suspend state for the RK806 buck 1-8 regulators.
Fix this by not adding one to the zero based buck variable.
Fixes: f172575d92 ("power: rk8xx: add support for RK806")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
dev_get_driver_ops() may return NULL when the udevice is invalid.
Move the ops check to top of functions to consistently return -ENOSYS
when ops is unimplemented and prevent trying to access uclass plat data,
also add missing NULL checks to suspend ops.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
On some boards a PMIC regulator is flagged with regulator-on-in-suspend
and does not define any suspend or max microvolt, e.g. on Radxa ROCK 3A:
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
This result in suspend_uV having the value -ENODATA after probe.
This negative voltage, -ENODATA, gets missinterpreted and result in an
unexpected voltage being set by autoset.
E.g. on Radxa ROCK 3A the vcc_ddr regulator by default have a normal and
suspend voltage value of 0.5v. However, due to this missinterpretation
the suspend voltage end up beind set to 0.5625v instead.
Fix this by skip calling regulator_set_suspend_value() in autoset and
also protect calling set value ops when input value is -ENODATA.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Various improvements to Snapdragon support:
* Bumped up the pagetable size to handle newer SoCs with much more RAM
* Made memory map parsing more robust, fixing chainloading on
SM8550/SM8650
* Populate fdt_addr_r with U-Boot's FDT by default, and set $loadaddr to
prevent
crashes with some commands which expect it
* Added initial support for SC7280/QCM6490 and the new RB3 Gen 2 board
* Add debug config fragments to enable debug UART on some SoCs.
* Enable RPMh regulators on SM8550/SM8650
* Map the cmd-db memory explicitly since it may not be in the memory map
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/22255
Add the PM8550 & related regulators found on the SM8550 and SM8650 platforms.
The tables are imported from the Linux driver.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
For regulator-fixed-clock, the device's private data is never set so in
fixed_clock_regulator_set_enable() is null and the function cannot
complete successfully.
Rename the _plat structure to _priv to better represent its role and set
this as the private data. As shown by the set_enable() function and by
using the same .of_to_plat hook as regulator-fixed, the platform data is
regulator_common_plat so also set .plat_auto correctly.
Finally, set up the private data by adding a .probe function to look up
the clock and set the member variable.
Fixes: f3b5100aff ("regulator: fixed: add possibility to enable by clock")
Signed-off-by: John Keeping <jkeeping@inmusicbrands.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is very old, predating even the legacy I2C support, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Port over the regulator ops to U-Boot's regulator API. Add back the
pmic5 mode map using U-Boot dm_regulator_mode API and adjust the
pmic5_pldo and pmic5_pldo_lv definitions. No functional changes.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Initially just include the few regulators needed for the RB5 board.
Others can be added back as-needed.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Commit 2ce40542e0 ("power: rk8xx: properly print all supported PMICs
name") fixed all PMICs name that were broken but broke the only one that
was not broken already: RK808. This one is a special case because the ID
registers are marked as reserved and always return 0, so the variant
cannot be derived the same way it is done for other PMICs from Rockchip.
Fixes: 2ce40542e0 ("power: rk8xx: properly print all supported PMICs name")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The generic AXP SPL driver implementation can cover all regulators we
need for the AXP305.
Add the descriptions for four of the six DC/DC regulators of the AXP305,
and enable that when CONFIG_AXP305_POWER is enabled. We won't need DCDC2
and DCDC3, but by using the position in the array for the index we keep
the code cleaner.
Also remove the old driver, and switch the Makefile to include the new,
generic driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The generic AXP SPL driver implementation can cover all regulators we
need for the AXP313.
Add the descriptions for the three DC/DC regulators of the AXP313, and
enable that when CONFIG_AXP313_POWER is enabled. Also remove the old
driver, and switch the Makefile to include the new, generic version.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
On boards using the AXP717 PMIC, the DRAM rail is often not setup
correctly at reset time, so we have to program the PMIC very early in
the SPL, before running the DRAM initialisation.
Using the new generic AXP SPL driver, add the Kconfig options and
platform bits needed to support an AXP717 PMIC chip in I2C mode.
This allows to set up the correct voltage for the DRAM chips and the
CPU cores.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Ryan Walklin <ryan@testtoast.com>
So far we had a separate driver file for each AXP PMIC chip that we need
to support in the SPL. The code in there was largely similar, but
differed in many details.
Based on the idea of the DM AXP driver, introduce a data structure to
describe each regulator in a compact way. This is a simplified version
of the struct used in the DM driver, as we don't need to support the full
voltage range and not every regulator in the SPL.
For now we only support the DC/DC buck converters, since that's what we
need the SPL to configure, mostly. Also we get rid of the regulator name,
and hardcode the regulator number by its position in the array (first is
DCDC1, second is DCDC2, etc). We also drop support for the value table,
we ideally won't need that for the subset of regulators required.
At the end each regulator is described by a 10 bytes struct, so we avoid
blowing up the SPL footprint, but still can use generic code.
Each chip is supposed to be described separately, and protected by
ifdef's, to only build in the regulators needed for a particular board.
We also describe the bits to help identifying the AXP chip, and the
shutdown details in that section.
Add a generic driver, that exports axp_set_dcdc<x>() functions to set up
the buck converters. For now this just contains the bits for the (new)
AXP717, but it's not wired up anywhere yet.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The axp<xxx>.c drivers are only used for the SPL, for U-Boot proper we
have a separate, DM compliant driver.
Mask the build instructions with CONFIG_SPL_BUILD, to avoid them being
build for U-Boot proper as well.
The AXP221 driver defines axp_get_sid(), which is used in the U-Boot
proper cpuinfo() code, and some old LCD code directly calls axp_set_eldo(),
so we keep that driver outside the new guards. This will be fixed properly
later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The X-Powers AXP717 is a PMIC with four buck converters and a number
of LDOs, one of which is actually fixed (so not modelled here).
Add the compatible string and the respective regulator ranges to allow
drivers to adjust voltages.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ryan Walklin <ryan@testtoast.com>
With a recent change, regulators_enable_boot_on() returns an error if a
regulator is already set. Check for and handle this situation.
Fixes: d99fb64a98 power: regulator: Only run autoset once for each regulator
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Jayesh Choudhary <j-choudhary@ti.com> says:
Hello there,
This series add the U-Boot support for our new platform of K3-SOC
family - J722S-EVM which is a superset of AM62P. It shares the same
memory map and thus the nodes are being reused from AM62P includes
instead of duplicating the definitions.
Some highlights of J722S SoC (in addition to AM62P SoC features) are:
- Two Cortex-R5F for Functional Safety or general-purpose usage and
two C7x floating point vector DSP with Matrix Multiply Accelerator
for deep learning.
- Vision Processing Accelerator (VPAC) with image signal processor
and Depth and Motion Processing Accelerator (DMPAC).
- 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio,
4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP,
ePWM, among other peripherals.
TRM: <https://www.ti.com/lit/zip/sprujb3>
Schematics: <https://www.ti.com/lit/zip/sprr495>
Boot test log:
<https://gist.github.com/Jayesh2000/0313e58fde377f877a9a8f1acc2579ef>
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Add the power domain platform data entries in alphabetical order.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The ID of the PMIC is stored in the 2 16b registers but the only part
that matters right now is the 3 MSB, which make the 3 digits (in hex) of
the part number.
Right now, only RK808 was properly displayed, with this all currently
supported PMICs should display the proper part number.
Additionally, when the PMIC variant is not found, print that value
instead of the masked unshifted value as all PMICs we support for now
have their LSB ignored to represent the actual part number.
Tested on RK806 (RK3588 Jaguar), RK808 (RK3399 Puma) and RK809 (PX30
Ringneck).
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
For the sake of consistency, make all internal (starting with _)
functions expect a pmic udevice instead of a regulator udevice.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-bob
