Files
u-boot/arch/arm/include/asm/arch-omap4
Lokesh Vutla 97405d843e ARM: DRA7xx: clocks: Update PLL values
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-06-10 08:43:10 -04:00
..
2013-06-10 08:43:10 -04:00
2013-06-10 08:43:09 -04:00
2012-02-12 10:11:31 +01:00
2011-09-04 11:33:36 +02:00
2012-09-06 06:01:09 +02:00
2013-06-10 08:43:09 -04:00